Hello,
I've got trouble using the LMH0030 for the generation of a PAL (BT601) test pattern.
Configuration of component is OK.
If I configure Test0 register so as to output a NTSC pattern, bit 7 of Test0 (PASS/FAIL) is asserted (logical high).
If I configure Test0 register so as to output a PAL pattern, bit 7 of Test0 is always deasserted (logical low).
I pay attention to modify I/O pin 7 config so as to be able to configure through register access only and I apply VCLK after complete initialization.
Moreover, even in NTSC (PASS/FAIL asserted), I've got nothing at SDI outputs.
Could anyone support us and/or give us some tests to be done?
Many thanks.