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TLK111 SWSTRAP and INT/PDN

Other Parts Discussed in Thread: TLK111

Hi,

I'm trying to do the following:

  a) delay power consumption of the TLK111 until my board has powered up (and negotiated for more power from the USB host).

  b) use the SW_STRAP feature to avoid having to add pull resistors on the MII interface pins.

  c) just tie the RESET pin on the Pin on the PHY to the board power on reset, and use the MDIO interface to reset the phy through software


I'm having trouble getting the phy out of low power mode.   I have a pulldown resistor on INT/PWDN.   I can also control it from the MCU but I need to remove this connection on the next PCB revision.

If I drive INT/PDWN high with the MCU I can get to link-active.

But I'm trying to avoid that.

I've set bit 0 of the SWSCR1 register to '1' to change the INT/PWDN pin to an interrupt output.

But, when I read PHYSCR,  bit 0 reads 0.   Even if I write a reset (bit 15) to BMCR ... I don't see that bit 0 of SWSCR1 gets copied over to PHYSCR.


I'm assuming that I need this copy to occur, in order to be able to leave INT/PWDN pulled down and take the PHY out of low power mode through the management registers.

But I am pretty much stuck trying to figure out how to make this work.   And I'm starting to suspect that maybe the RESET\ through the BMCR register is not sufficient for this task.

 

  • Hi Anthony,

    We will review this and get back to you soon.

    Regards,
    Ross
  • Hi Anthony,

    Do you have an external pull-down connected to pin 21 so that SW Strapping Mode can be enabled? I am assuming you do since you are trying to use the SW Strapping mode.

    The condition you describe is that the device is in power-down mode, but you are not able to get out of that mode until you actively drive the int/pdwn pin high.

    Are you sure that SW Strapping mode has completed? The reason why I ask is because the PHY will remain in power down mode until you release this mode. To end SW Strapping mode and get the phy out of power down mode:

    You must set Register 0x0009 Bit[15] = 1 ("Configuration Done" bit)

    Regards,
    Ross
  • Hi Ross,

    Yes, I have pulldown resistors on both pins 7 (INT*\PWDN*) and 21 (SW_STRAP*).
    I thought I tried setting bit 15 / config done on friday but I may have been mistaken.
    I'll check again now.
  • Hi Ross,

    I checked, and I've got code writing bit 15 of SWSCR1.

    Doing it this way:

    ...

    /* The Values for SWSCR Registers */
    #define Tlk111_SWSCR1_Val (Tlk111_Auto_MDIX_Ena | Tlk111_Auto_Neg_Ena | Tlk111_Auto_AnMode_100BT_FD | Tlk111_Force_LEDMode1 | Tlk111_IntPdn_InterruptOut)
    #define Tlk111_SWSCR2_Val (Tlk111_Rsv1 | Tlk111_RXERR_DuringIdle)
    #define Tlk111_SWSCR3_Val (0u)

    ...

    uint32 Tlk111SwStrap(uint32 mdioBaseAddr, uint32 phyAddr)
    {
    MDIOPhyRegWrite(mdioBaseAddr, phyAddr, (uint32)PHY_SWSCR1, Tlk111_SWSCR1_Val);
    MDIOPhyRegWrite(mdioBaseAddr, phyAddr, (uint32)PHY_SWSCR2, Tlk111_SWSCR2_Val);
    MDIOPhyRegWrite(mdioBaseAddr, phyAddr, (uint32)PHY_SWSCR3, Tlk111_SWSCR3_Val);
    MDIOPhyRegWrite(mdioBaseAddr, phyAddr, (uint32)PHY_SWSCR1, (Tlk111_SWSCR1_Val | Tlk111_SWStrapDone));
    }

    And after this, I'm still apparently in power down mode. If I release the INT*\PWDN* pin in this state and do nothing else, then I can see that the link LED on the switch I'm plugged into goes on in about a second (and it may be taking most of that time to execute the command through the JTAG debugger..)

    But I'd like to not have a pin connected to INT*\PWDN* or at least not rely on it, since it would be a pin belonging to a timer module on the MCU used in GIO mode. I can forsee customers having trouble with this, as it's a launchpad and will go to lots of people w. various levels of embedded experience. So want to bring it out completely through MDIO if possible.

    EDIT:  I forgot to add, I can read back SWSCR1 after the sequence above and confirm that bit 15 is set.

  • Hi Anthony,

    Have you changed the interrupt polarity? Maybe you are causing an interrupt since the bit is still low. Look at bit[3] in register 0x0011 (PHYSCR) and also bit[1] interrupt enable.

    Regards,
    Ross