I am currently utilizing the LVDS de-serialization device SN65LVDS302 in a new design implementation.
The design is utilizing only one of the 3 available differential pair channels.
1. For the other two differential pair channels that are unused, should they be held high (VDD) , floating, held low (Ground Reference) , or don't care?
For board layout issues, I would like to tie one pin (F1 / Channel 1 D+) to VDD for power distribution.
2. For Single Ended Output Pins, should they be held high ( VDD ) , floating, held low (Ground Reference) , or don't care?
For board layout issues, I would like to tie two pins (F8 & F9 / Red 6 and Red 7) to pin F7 VDD for power distribution.
Thank you for your response,