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PCA9536 - Vdd dips above POR voltage

Other Parts Discussed in Thread: PCA9536, TCA9536

Hello I2C Experts

if the PCA9536 is powered at eg. nominal  Vdd = 3V and the Vdd then drops below 2.3V ( Vdd min in dada sheet ) but stays above POR voltage and then goes back to 3V.. 

What will happen then?  Will the part latch-up , reset or maybe stop working?

  • Hello Bond, James Bond,

    It depends how long it drops below. Theoretically, as long as you stay above VPORF, you might be ok. However, it is possible that the part will reset depending on the voltage it drops to, because VPOR has hysteresis and will vary between falling and rising edges. It would be best to do your best to assure that the voltage does not dip below 2.3V. Otherwise, you may be better off assuming that the part has reset and re-configure it, just in case, since we do not guarantee performance of the PCA family of IO expanders during glitches. Our TCA family of IO expanders does allow some glitching like you have described without problems, but with time restrictions.
  • Thanks Jonathan,

    if the I2C signals in some cases don't comply with I2C time requirements will this lead to the PCA9536 going to a latch-up failure mode where it will not be able to be accessed by the MCU?
    Situation: The I2C lines serve dual purpose and will in some cases be used also as digital inputs to the MCU and the timing for the signals will have very little I2C timing compliance..
    After being used as digital inputs the I2C lines are released and the normal I2C communication could then start - but could this lead to the PCA9536 not being accessible?

  • Bond, James Bond (007), 

    I assume you are referring to the rise and fall times, as well as other timing specs (like data hold and valid times). If you violate these, the PCA/TCA9536 will most likely just NACK your request. 

    Worst case scenario, if you happen to violate timing only after it has ACKed its address and register request, and is listening to data, the PCA/TCA9536 interprets data incorrectly.

    There are no scenarios that I can think of that would cause the device to latch up from I2C timing  violations. VCC supply ramp violations, though, can cause the device to become unresponsive until a power supply is re-ramped within specification.