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Recommendation for a Retimer

Other Parts Discussed in Thread: DS125DF111, DPS-DONGLE-EVM, DS125DF111EVM, DS125DF410, DS125RT410, DS110DF410

Hello,

I am looking for a multi rate retimer that can support the following rates (Gbps): 1.25, 2.5, 3.125, 5, and 6.25

One device that might do the job is DS125DF111. Do you recommend this device or something else?

The following questions are about this particular device:

If I am reading the datasheet correctly, the bitrate needs to be set, and the device can lock to 1, 1/2, 1/4, and 1/8 of that rate. Is that correct? If so, do I need to set the rate to 12.5 to support 6.25 and 3.125, and set the rate to 10 to support 5, 2.5, and 1.25? If not, how would I go about supporting all these rates?!

Can I set two rates (12.5 and 10) so the device can automatically lock to all the rates above?

Is there sample software or a tool for generating register configuration for this device?

Does the device work equally well whether it is powered from 2.5V or 3.3V?

Does

Thanks,

Hamster

  • Hi Hamster,

    The DS125DF111 is a workable solution for supporting operation at those data rates. Can you specify which protocols you will need to support? The DS125DF111 is intended for use in front-port Ethernet optical and copper interconnects and not intended to be used in environments where link-training is a mandatory part of the protocol (for example, in PCIe Gen-3), so we would like to double check that the application is appropriate.

    Regarding your DS125DF111 questions:

    1. Yes, the device can be configured to lock to divide by-1, -2, -4, and -8 data rates, where the divide-by value is a ratio taken from the VCO range of 9.8-12.5 GHz. There are two VCO groups available. You will need to group your data rates so that there are two VCOs and all other data rates you must support are some divide-by ratio of the VCO.

    2. Looking at your data rates, 6.25 and 3.125 Gbps go into one VCO group where VCO = 12.5 GHz (12.5/2 = 6.25 Gbps and 12.5/4 = 3.125 Gbps), while 5, 2.5, and 1.25 Gbps go into the other VCO group where VCO = 10 GHz (10/2 = 5 Gbps, 10/4 = 2.5 Gbps, and 10/8 = 1.25 Gbps). If you set one VCO group to 12.5 GHz and the other to 10 GHz, you can support your data rates. Your understanding is correct.

    3. Yes, you can set two VCO group. Use Table 13 on p.23 of the DS125DF111 datasheet to program the Group 0 VCO to 12.5 GHz, and use Table 14 on p. 24 of the DS125DF111 datasheet to program the Group 1 VCO to 10 GHz. I would then advise that you leave the Rate and Subrate values (Table 9 on p. 22) in their default states so that the DS125DF111 can lock to all the data rates you require.

    4. Yes, there is a tool. Please refer to SigCon Architect product page. From there, you can download the GUI and retimer profile, from which you can then program the DS125DF111 with an intuitive graphical interface. Please note that in order to do this, you will need to put in a request to dps_marketing@list.ti.com for a DPS-DONGLE-EVM in order to interface from your PC to a DS125DF111EVM.

    5. Yes, it works equally well. You will have lower overall power consumption with 2.5-V, as operating in 2.5-V mode will allow you to bypass the use of an internal LDO that would otherwise be used when powering with a 3.3-V supply.

    Thanks,

    Michael
  • Hello Michael,

    Thank you for getting back to me.

    We would be using this in a CoaXPress system. Unfortunately, the specification is not freely available, but we would be using EQCO62R20 and EQCO62T20 from Microchip:
    www.microchip.com/.../EQCO62R20

    If you look at Figure 1-1 in the datasheet, we would be using the retimer between the camera and EQCO62T20, and also between EQCO62R20 and the frame grabber. We would be using it for the downlink (not the 21 Mbps uplink).

    I think this is a straight 8b10b data and there is no training data.

    If I have a custom board that does not provide SMBus header to be used by the DSP-DONGLE-EVM. Can I still use SigCon Architect to figure out what the register setting needs to be? Or the software is usable only if a Dongle is present?

    Thanks,
    Hamster
  • Hi Hamster,

    I believe the DS125DF111 should be a suitable part for this application.

    If you do not have a way to access the board's SMBus SDA and SCL pins with a DPS-DONGLE-EVM, you can still use SigCon Architect in demo mode to reference the register settings.

    Regards,

    Michael
  • Hello Michael,

    Thank you for looking into this.

    What do you recommend we do with an input (INA+/- or INB+/-) if it is not used?

    Thanks,
    Hamster
  • Hi Hamster,

    If the input is not used, it can be left floating. The internal signal detect of the DS125DF111 will automatically mute the outputs when the input signal falls below the signal detect threshold. To save power, you can also power down the unused channel's driver via SMBus control.

    Thanks,

    Michael
  • Hello,

    This part worked nicely for us in our design.

    I have a question regarding saving power for an unused channel: If the input is floating, the output is muted. Does this automatically power down the channel driver? If not, which register bit do I use to power it down?

    We are now working on a design that needs retimers for 4 channels. At first glance DS125DF410 looks like a 4-channel version of DS125F111. DS125RT410 looks close, without DFE. I see the part does not support 3.3V for powering the core, and that is fine. As far as I can tell, each channel of DS125DF410 is similar to a DS125DF111 channel. We need two VCOs to support our various rates, and it looks like they are available. Is there any other functional differences between the 2-ch and 4-ch devices?

    One more question regarding power supply recommendations: We followed what is recommended for DS125DF111, and that worked for us. I have been wondering why no filtering is needed for this component. Typically I see either constraints on power supply ripple, or ferrite beads to reduce the ripple. Why nothing along those lines are recommended for these parts? Is DS125DF410 similar to DS125DF111? In Figure 3 of DS125DF410 datasheet I see internal 1.2V and 2V regulators. Are these providing filtering? Are these also present in DS125DF111 components?

    Thanks,

    Hamster

  • Q1: Yes an unused input will automatically put the channel into a low power mode with the output muted.

    Q2:  Basically they are the same analog device.  There are some digital differences with the equalization table and the low speed manual equalization setting.

    Q3:  There is some filtering with the internal regulation for various circuitry.  The overall reason is that these devices are not CMOS -  so there is very little in the way of internal noise generation.

    Regards,

    Lee

  • Hello,

    I am seeing an issue with DS125DF410 that I did not see with DS125DF111. I am configuring the two VCOs as follows:

    Group 0: 12.5G to support 6.25G and 3.125G

    Group 1: 10G to support 5G, 2.5G, and 1.25G

    The problem I am seeing is that when the input rate changes within a group, most of the times the device does not  lock to the new rate. Switching between the two group rates seems to be OK. I know this because I don't get a loss-of-lock interrupt when the input rate changes, and the device that is expecting the new rate from the retimer does not lock.

    I am hoping that this is not the expected behavior and I have misconfigured something to cause this issue. Please advise.

    Thanks

  • If you set channel register 0x0C[3]=0 does it help with the retimer CDR lock behavior that you observe?

    Regards,

    Rodrigo Natal

    HSSC Applications Engineer

  • Setting 0x0c[3] to zero does not seem to be helping.

    Here is another observation while testing. Our system is connected as shown below:
    Tx -> cable -> DS125DF410#1 -> cable -> DS125DF410#2 -> cable -> Rx
    The issue I raised above is when Tx rate changes.
    To reiterate, if Tx rate changes between the two VCO group rates, most of the times both retimers in between adapt to the rate change: both repeaters generate CDR lock interrupt, etc.
    If Tx rate changes within the same VCP group rate, DS125DF410#1 almost never detects the rate change (I don't get CDR lock interrupt).
    The new observation is that interestingly enough, DS125DF410#2 generates a CDR lock interrupt. That seem to indicate that DS125DF410#1 is generating an output that #2 does not like, but #1 does not generate a CDR lock interrupt, and it does not adapt to the new rate.
  • Does your applicaiton setup allow for performing CDR Reset and Release operation to the DUT retimer channel in question whenever the data rate is changed?

    -Rodrigo

  • The boards containing the retimers don't currently communicate with Tx or Rx board. The assumption was that retimer would figure out that the rate changed and would adapt to it.

    If we don't get a lock/signal loss interrupt, is there any other way of figuring knowing from the retimer that the rate changed?

    I have been experimenting with resetting the whole channel (via channel register 0) whenever a signal/lock loss interrupt was received. I thought maybe that would help, but that does not appear to be the case.

  • Tx -> cable -> DS125DF410#1 -> cable -> DS125DF410#2 -> cable -> Rx
    I now have code that resets the whole retimer channel (via channel register 0) when I receive lock/signal loss on both #1 and #2 devices. This seems to have helped device #2 when switching between rates that are not in the same VCO group. When I had the reset for only device #1, I was still seeing intermittent failures. I can now go through the rate changes many times, and it does not fail anymore. The sequence of rate changes that works in order: 2.5, 3.125, 5, 6.25, 2.5, etc.

    I can also go from 6.25G to 3.125G, and at least in my limited testing that seems to work. However, I can never go from 3.125G to 6.25G. This always fails (I don't get loss of lock interrupt either).

    Similarly, I can go from 5G to 2.5G, but I can't go from 2.5G to 5G.
  • Unfortunately, I am now getting intermittent results. I am getting failures even when switching between VCO groups. I am wondering if I am configuring the registers in a way that causes this problem. I have backed out any tweaking except for setting the two VCO groups, and setting register 0x2f to 0x66 (to adapt to 1/2, 1/4, and 1/8 rates).

    The attached eye diagram I captured (using retime feature) from #1 and #2 devices when switching from 2.5G to 5G. This is the case I mentioned before where #1 does not indicate a loss of lock, but #2 indicates loss of lock. I think these diagrams match the symptom. The bottom one is from #1. The rate has doubled, and the eye diagram is showing two eye, and the retimer has not locked to the new rate. THe top one is from #2. It is receiving bad data from #1, and loses lock.

    I will add another post with another eye diagram

  • Here is another one I captured going from 2.5G to 3.125G (between VCO groups). I was seeing this kind of failure very infrequently, but it is happening all the time now. I can't explain what has changed. But, the eye diagrams indicate that #2 has failed to adapt to the new rate.

  • For verification, I ran through the same exercise with DS125DF111 in our previous product, and switching between the same rates (in any order) never fails.
  • On the DS125DF410 if you set 0x3A=0x00 does it help? On the DS125DF410 during Rx EQ adaptation, if the divider setting is >2 then a fixed EQ is implemented per the contents of 0x3A.

    Rodrigo

  • Unfortunately, that does not help either.

    To summarize my observations, either #1 or #2 retimer fails to adapt. I can tell which one it is by looking at the eye diagram. The failing one shows two or more eyes in the diagram. If I reset that device, the link comes up.

    Is it possible to work with someone at TI directly to resolve this issue in a timely manner?

  • I will take the action to try to replicate your retimer issue in our lab, and then to attempt to come up with a register settings workaround for it. I will shoot to have a results update for you by this Wednesday USA Pacific Time.

    Rodrigo Natal

    HSSC Applications Engineer

  • I performed an experiment where I set a DS110DF410 channel to PRBS generator and feed this output to the input of another channel. On the PRBS genenerator side I forced divider settings of 1, 2, 4, and 8. I monitored CDR lock status on the Rx channel. I went back and forth between tx divider settings and did not observe any lock issues on the Rx channel. I think perhaps there may be a issue with your own write operations that you might be overlooking. Please provide me your email address and I can follow uo with you directly with additional suggestions.
  • Hello Rodrigo, Thank you for fast response on this. Yes, the problem could very well be something that I am doing, but I can't see what it is. This being a public forum, I don't want to post my email address here. Could I call tech support and ask them to send you my email address? Please let me know what you suggest. Thanks.
  • My intention was to request your script of I2C operations to retimer. Are you able to post it here?