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LV24EVK01 Signal latency

na na78
Guru 16770 points
Other Parts Discussed in Thread: LV24EVK01, DS92LV2421, DS92LV2422

Hi

With LV24EVK01, the input signal VS / HS of DS92LV2421 is delayed from VS / HS of DS92LV2422 by 280 clock approximately.

Is it normal operation?

PCLK : 25.175MHz

VS : 31.469KHz

HS : 59.94Hz

LED2 on the EVM shows LOCK.

BestRegards

  • 0
    TI__Mastermind 29635 points
    Hi,

    Based on your description, this appears to be normal operation.

    According to the datasheet on p. 14, the tSD parameter is maximum 145 x T for serializer latency delay. Meanwhile, on p. 15, the tDD parameter is maximum 140 x T for deserializer latency delay.

    From the input of the DS92LV2421 to the output of the DS92LV2422, it may therefore be possible that the latency is a maximum of:

    (145 x T) + (140 x T) = (285 x T)

    Thanks,

    Michael