Other Parts Discussed in Thread: DS100BR210
Customer is evaluating below condition for DS100BR210EVK.
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①SER (FPGA) --> cable (3m) ---> DES (FPGA、Internal EQ:OFF)
②SER (FPGA) --> cable (3m) ---> DES (FPGA、Internal EQ:ON)
③SER (FPGA) --> cable (3m) ---> EQ(DS100BR210EVK) ---> cable (1m) ---> DES (FPGA)
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When Noise applied test, ① and ② were occur moment noise on the display,
but ③ was moment black out on the display.
I think that ③ is stopped EQ output.
And, equalizer function is not affect because of ②(FPGA、Internal EQ:ON) is normal operation.
If there condition of stop the EQ, please let me know.
(for example: protection circuit, over recommend range, etc)
Best regards,
Satoshi