This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Pls help me to design a automatic fault isolation for two redandunt circuit

Other Parts Discussed in Thread: TIDA-00810, TIDA-00807

I want to design a system with two parallel redandunt architecture. But I do not know how can make a 100% relible automatic fault isolation? How when a pařt of subsystem 1 will be damage it will not affect properly work of subsystem 2 ?

Have Ti any part for switch , splitter, ... that specified what is the state of I/O when the device is off(vcc=0) or when device damaged?