Our application implements a Powerlink interface, with the following characteristics:
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FPGA, Cyclon V, with Powerlink IP
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two Ethernet posrts with TLK106L, both configured in RMII mode
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One oscillator @ 50MHz configured as suggested by data-sheet, se figure
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trafo used TG110-E055N5RL
We have 30 boards with at least 12 having ethernet problems:
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tested both with Powerlink node and with traditional ping test: the link is not stable, for example with test ping there are % of errors (the % changes from board to board)
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tried different workarounds without solving the problem:
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different timings in FPGA
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different clock routing
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changing external trafo (HX1188NL)
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The only way that seems to solve the problem is changing the Ethernet phy: in two boards with only one link fail, we exchanged between them the phy and the fail follows the phy!
Changing the phy with a new one the problem disappear.
Now, we have the phy substituted, is it possible for TI to verify these devices?
