DS90UB940-Q1: How to configure the CSI indirect register of 0x02

Angus

Part Number: DS90UB940-Q1

Hi, team

In page 16 of 940 datasheet, three are the following notes:

(4) (a) 1280x720p60; PCLK = 74.25MHz; 4 MIPI lanes reg0x6c=0x02; reg0x6d=0x84
(b) 1280x720p60; PCLK = 74.25MHz; 2 MIPI lanes reg0x6c=0x02; reg0x6d=0x89
(c) 640x480p60; PCLK = 25MHz; 4 MIPI lanes reg0x6c=0x02; reg0x6d=0x82
(d) 640x480p60; PCLK = 25MHz; 2 MIPI lanes reg0x6c=0x02; reg0x6d=0x83
(e) Other video formats may require additional register configuration.

Can you give me more details about this notes? How should I configure it if I use other video format?

Thank you!

Best Regards

over 6 years ago

0 Steven(Shenzhen) Shi over 6 years ago

TI__Mastermind 30515 points

Angus,
The registers of 0x6c/6d are indirect registers for CSI2 I/f. If the custom video resolutions outside of CEA861 should use the settings of 0x6c/0x6d. For your case, please let's know your detailed video format? thanks.

Active line length in pixels： pixels
Total line length in pixels： pixels
Horizontal porch in pixels： back porch in pixels, front porch in pixels
Active lines/frame： lines
Total lines/frame： lines
Vertical porch in lines：back porch in lines, front porch in lines
Frames per second：

best regards,
Steven

0 Angus over 6 years ago in reply to Steven(Shenzhen) Shi

Intellectual 370 points

Hi Steven, thank you for your help!
We use UB947 and UB940 pair, and the parameters you need is the timing information of LVDS input to the UB947?

0 Steven(Shenzhen) Shi over 6 years ago in reply to Angus

TI__Mastermind 30515 points

Yes, the defaulting timing is based on CEA861.

best regards,
Steven

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DS90UB940-Q1: How to configure the CSI indirect register of 0x02