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TIC12400EVM-KIT: TIC12400 sleep mode setting

Part Number: TIC12400EVM-KIT
Other Parts Discussed in Thread: TIC12400-Q1

I am trying to configure the device in sleep mode so that any switch state change it gives interrupt to MCU

and for interrupt mode, the trigger is required or not. what is the proccess for it

DEVICE_ID = 0x01000000;
INT_START = 0x02000000;
CRC = 0x0300FFFF;
IN_STAT_MISC = 0x04000000;
IN_STAT_COMP = 0x05000000;
IN_STAT_ADC0 = 0x06000000;
IN_STAT_ADC1 = 0x07000000;
IN_STAT_MATRIX0 = 0x08000000;
IN_STAT_MATRIX1 = 0x09000000;
ANA_STAT0 = 0x0A000000;
ANA_STAT1 = 0x0B000000;
ANA_STAT2 = 0x0C000000;
ANA_STAT3 = 0x0D000000;
ANA_STAT4 = 0x0E000000;
ANA_STAT5 = 0x0F000000;
ANA_STAT6 = 0x10000000;
ANA_STAT7 = 0x11000000;
ANA_STAT8 = 0x12000000;
ANA_STAT9 = 0x13000000;
ANA_STAT10 = 0x14000000;
ANA_STAT11 = 0x15000000;
ANA_STAT12 = 0x16000000;
CONFIG = 0x1A00040C | 0x00001000 | 0x00000800;

CS_SELECT = 0x1C0003FF; 

WC_CFG0 = 0x1DB6DB6D;
WC_CFG1 = 0x1E16DB6D;
CCP_CFG0 = 0x1F000000;
CCP_CFG1 = 0x20000000;
THRES_COMP = 0x21000000;
INT_EN_CFG_0 = 0x24000004;
INT_EN_CFG_1 = 0x25000000;
INT_EN_CFG_2 = 0x26000000;
INT_EN_CFG_3 = 0x27000000;
INT_EN_CFG_4 = 0x28000000;
THRES_CFG0 = 0x29000000;
THRES_CFG1 = 0x2A016800;
THRES_CFG2 = 0x2B00D247;
THRES_CFG3 = 0x2C045C77;
THRESMAP_CFG0 = 0x2E000000;
THRESMAP_CFG1 = 0x2F023000;
THRESMAP_CFG2 = 0x300001F5;
MATRIX = 0x31000000;
MODE = 0x32000000;

  • Hello Prateek,

    The TIC12400-Q1 will not monitor the input pins until the TRIGGER bit is set. It looks like you have correctly enabled the interrupt to be asserted on a state change of the input pins. You will want to set the register settings to the desired configuration, then set the TRIGGER bit to logic 1 to start polling the inputs.