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DS90C187: Asking for the DS90C187 issues

Part Number: DS90C187

Hi team,

We have found the following result on our android/Linux system.

The Host CPU has two LCDC, we use LCDC1 as source of LVDS DS90c187.

 Use fbset get the following message.

***************************************

mode "1600x900"

    geometry 1600 900 1600 900 16

    timings 0 200 40 30 2 40 2

    nonstd 4

    rgba 5/11,6/5,5/0,0/0

endmode

***************************************

 

The Panel spec refer to “2018-06-06 17_195WD1_Panel_Spec.png” as attached and the Panel support 16.7M color(RGB888).

 

Is the circuit support 24bit color display supported?

If not, can you help us on this application with your recommendation.

please refer to the schematic and panel spec.

 

Many thanks for your helps!

  • SHH,
    sorry I can't understand your issue well.
    For C187 device, please check d/s page2/3, page13 on working mode and the input/output mapping relationship which is needed to pair with panel. also for single pixel in, the maxim PCLK freq. is 105MHz shown in d/s.

    best regards,
    Steven