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FPC402: Downstream I2C clock rate

Bala Iyer
Prodigy 190 points
Part Number: FPC402

We have FPC402EVM.

While setting the down stream I2C clock rate to 100KHz, the actual clock speed observed is only 80KHz

While setting the down stream I2C clock rate to 400KHz, the actual clock speed observed is only 320KHz

How to get the FPC402 to operate at the designated clock speed of 100KHz and 400KHz ?

We are operating with VDD1 = VDD2 = 3.3V

Is there any dependency on any voltage or other parameters ?

  • 0
    TI__Intellectual 1715 points

    Hi Bala,

    There is an internal clock that generates the SCL frequency in FPC402. This clock can vary by +/-20%, so to keep the I2C bus speed from exceeding the I2C standard rate of 100 KHz (and 400 KHz for Fast mode), the TYP value by default is maintained at 83 KHz. 

    This speed can be programmed through the I2C registers 0x11, 0x12 and so on. Please see Section 2.18 and 2.19 in the Programmer's guide.

    Thanks,

    Sri  

  • 0 in reply to Sriharsha Kota Pavan
    Prodigy 190 points

    Hello Sri

    It is a great point that you are trying to keep the upper bound of the I2C clock within the 100KHz and 400KHz.

    But -20% seem to a lot of variation.. I could not find info on the frequency of the AON clock in the parametric section.

    There is only a reference to 30MHz in text description. I can understand that the default value of the two registers (eg: 0x11 and 0x12) will provide 100KHz, if the AON clock is 30MHz (30 div (152+152))

    I am not sure if the frequncy will vary widely from power up to power up.

    If that is the case, if we do not know the  frequency of the AON clock on the device for the current power up scenario, what purpose does register 0x11 and 0x12 serve ?

    Do you have any advice for getting this to a more deterministic value and still not violate the upper bound for the clock like 100KHz and 400KHz etc ?

    Thanks

    Bala

  • 0 in reply to Bala Iyer
    TI__Intellectual 1715 points

    Hi Bala,

    The AON clock frequency should not vary from power up to power up. It only varies across the PVT by up to 20%. There is no way to reduce this variation unfortunately. The purpose of the registers 0x11 and 0x12 etc is mainly to provide support for slaves using fast mode I2C rate of 400 KHz.

    Thanks,

    Sri