This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB954-Q1: UB954 MIPI-CSI2 TX issue

Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: TIDA-01130, ALP

Hi, Ti partner:

I have a camera system: TIDA-01130 (ov2775 + UB953 )   link to  Nvidia TX2 Board(UB9534 + TX2 )

The  Nvidia  TX2 Board runs a linux system, with kernel-4.4 Version.

Now, I need to develop the TIDA-01130 driver that the camera can run in the TX2.

I have add the driver to suit TX2, but when i run v4l2-ctl tool to capture a RAM image from TIDA-01130, cat not get a  valid RAM image. 

About the TX2 log show, it indicate TX2  do not get a Frame Start from the ub954. 

I have measure the MIPI CLK/DATA wave of the ov2775  and UB953 TXout,  the wave  is exited. But am not sure they are really correct.

I double it most be the UB953 TXout not  correct.

Here is my UB954, UB953 register configures:

// UB954 init:

UB954_write_reg(s_data, 0x4c, 0x01);
UB954_write_reg(s_data, 0x58, 0x5e);
UB954_write_reg(s_data, 0x5b, 0x30);
UB954_write_reg(s_data, 0x5c, 0x30); 
UB954_write_reg(s_data, 0x5d, 0x6c); //sensor i2c addr
UB954_write_reg(s_data, 0x65, 0x6c); //sensor i2c addr alias
UB954_write_reg(s_data, 0x6d, 0x7c);
UB954_write_reg(s_data, 0x32, 0x01);
UB954_write_reg(s_data, 0x33, 0x01);
UB954_write_reg(s_data, 0x21, 0x01);
UB954_write_reg(s_data, 0x20, 0x00)

// UB953 init:

// Sensor Mclk in: 24Mhz
UB953_write_reg(s_data, 0x06, 0x41);
UB953_write_reg(s_data, 0x07, 0x28);

//Sensor PWDN and RESET pins setting
UB953_write_reg(s_data, 0x0e, 0xf0);
UB953_write_reg(s_data, 0x0d, 0x00); 
usleep_range(2000, 2010);
UB953_write_reg(s_data, 0x0d, 0x04);
usleep_range(2000, 2010);
UB953_write_reg(s_data, 0x0d, 0x0c);
usleep_range(2000, 2010);

Above these setting , my purpose :

1. TX2  supplied a 24Mhz MCLK to ub954,  ub953 with the ub954 CLKin, that can supply  a 24Mhz to  ov2775 sensor

2. ov2775  with 4-lane MIPI output,link to the ub954 RX0,  and ub954 RX1 are disabbled.

3. ub954 TX out with 4-lane to TX2-Board.

Please help me check if there registers setting  are okay?

This issue  troubled me a long time, thanks a lot!

  • Hi Miao,
    1. please run the pattern test firstly to check it is UB953 board issue or UB954 board issue?
    2. to run UB953 board, please follow up TIDA-01130 user guide, it has some reg. setting recommendation. but for OV2775, you should contact it with OV vendor based on the design guideline
    3. to configure UB954 in normal operation mode, please refer to the script in ALP tool, which as refer. CSI2 forwarding setting. btw, you also can refer to one example script in UB964 EVM board user guide (page21), it has refer. setting.

  • Hi,

    I  think it is a  UB954 issue,   because after i have do the sensor、ub953、ub954 setting, the ub954 can identify the frame size right. 

    Now, I have a question about CSI_PLL_CTL (Address 0x1F) :

    board.WriteI2C(UB954,0x1f,0x02)  //CSI_PLL_CTL: 800Mbps  default

    This indicate the UB954 TX0 MIPI out is 800Mbps /lane?

    My sensor mipi out ls 960Mbps/4lane,  equa 240Mbps/lane. What is the really speed of the UB954 TX0 MIPI out?

  • The real lane rate of UB954 CSI2 port is 800Mbps/lane, as indicated in your CSI_PLL_CTL setting. but the video data only occupied ~240Mbps/lane, other is LPS status required in CSI2 spec.

    bset regards,