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DS125BR800A: DS125BR800A use issue

Eagle.Miao
Intellectual 910 points
Part Number: DS125BR800A

How can the DS125BR800A not enable PCIE, SAS/SATA protocols, only need to output the input differential signal, and can set EQ value?

The current operation is through the I2C configuration register

  • 0
    TI__Mastermind 43795 points

    Hi,

    The DS125BR800A does not track PCIe or SATA/SAS protocol.  It can be used with any AC coupled differential signal.

    There are a couple key registers to control

    Register 0x06 = 10'h (default).  Change to 18'h to enable SMBus interface control.

    The equalization settings may not be ideal for your application.  I recommend to start with a low setting and increase the value slowly.

    For example:

    CH0:

    EQ Register 0x0F = 00'h

    DEM Register 0x11 = 00'h

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 50 points
    hi Lee,
    Here is my settings: MODE,SD_TH, RXDET float ,i2c slave mode ,CH0,CH1,CH2 channels are used,
    0x08=0x5c, 0x06=0x18,
    0x0e=0x0c, 0x15=0x0c, 0x1c=0x0c
    0x11=0x00, 0x18=0x00, 0x1f=0x00
    0x0f =0x0f, 0x16=0x0f, 0x1d=0x0f
    And it seems that it didn't work when increasing the value of EQ register from 0x00 to 0xFF, the differential
    signal amplitude to DS125BR800A is extremly as low as 90mV, any suggestion?
  • 0 in reply to akuaku
    TI__Mastermind 43795 points

    Hi,

    I would recommend to force the signal detect function "on". It is possible the amplitude is not enough the keep the device active.

    Write registers:  0x0D = 02'h, 0x14 = 02'h, 0x1B = 02'h

    Can you send a picture of the input and output waveforms?

    What is the datarate?

    Thanks,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 50 points

    hi Lee,

         When set 0x08=0x58, the output signal can be adjusted by EQ register, and when increasing form 0x00 to 0x09 it works.

         But the output does not enlarge the amplitude  when increasing value form 0x09 to 0x0f , and it seems that the EQ is not linear while the  register 0x04 = 0x00. 

         The datarate  is between 0.5G ~1.6G. It varies according to different settings.

         Any suggestions?

  • 0 in reply to akuaku
    TI__Mastermind 43795 points

    Setting 0x08 = 58 does three things:

    1. Overrides the signal detect pin functionality

    2. Sets Idle control to the registers

    3. Overrides RXDET

    For a low datarate and low amplitude signal I would just force the signal detect "on" as I described in my previous post.

    At these lower datarates you are not going to get a large gain from the equalizer, it is tuned to provide maximum gain for 10 Gbps signals.

    The equalizer is linear to a point, and the output driver will also impact the total device response.  Since you are "floating" the MODE pin, the output will be in limiting mode for these low datarates.  The voltage gain you see is coming from the driver circuitry after the CTLE function.

    Regards,

    Lee

  • 0 in reply to Lee Sledjeski
    Prodigy 50 points
    hi Lee,
    Thanks a lot, it works.
  • 0 in reply to akuaku
    TI__Mastermind 43795 points

    Glad to help.

    Regards,

    Lee