Hi team,
I am confused about the description about the power on reset in the datasheet.
There is a description: After that, Vcc must be lowered to 0V and then back up to the operating voltage for a power-reset cycle.
So for the power-on reset, it means I need to firstly set the Vcc to 0V and then ramp up the Vcc. Is it correct?
I also find a change about the voltage as below:
1.Does this mean by in the previous, we also need to bring the VCC to below 0.2V and then ramp up the VCC to reset the chip?
2. What does this change for? Is there any silicon change or mental change in the chip?
Lacey
Thanks a lot!