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Original question:

DP83849IF reference design : about LVPECL I/F with HFBR-5803

DP83849ID: Interfacing DP83849IF with AFBR-5803

Benjamin Schmidt25
Prodigy 30 points
Part Number: DP83849ID

Hello,

i have the same question as in this thread:
https://e2e.ti.com/support/interface/f/138/t/537702
-> how to Interface LVPECL correctly

unfortunately there is no answer mentiond but the topic is already closed.

I wonder about the resistor values of the thevenin Network, especially of the RX path.
At transceiver side i use 150R connected to ground as mentioned in the appnote of the AFBR-5803.
Then an AC coupling. Finally i have the option to mount a thevening Network / high impedance voltage devider or even a parallel termination.

According to the datasheet of the DP83849ID, it should be 130R to VCC (3,3V btw) and 80R to ground. But this would not lead to an DC bias of 2V LVPECL has.
It would lead to an offset of ~1,3V which fits the common known value of Vcc-2V. 

But finally the Input levels of the receiver have to be fulfilled, the DP83849ID device in this case.
For fiber mode i cannot find according notes. Regarding the mentioned other thread I'm even more confused and it seems it's not clear at all.

It would great if someone can give me some advices.

Best regards
Benjamin

  • 0
    TI__Mastermind 19780 points
    Hi Benjamin,

    As you mentioned, for RX path, you need to satisfy the DP83849 receiver. This can be done with the termination shown in the datasheet and on the EVM. If you have more questions about the parameters of the receiver, I think we could discuss offline with your assigned FAE. I have also alerted a colleague that may be able to post the requirements of the receiver here for you.

    Best Regards,
  • 0 in reply to Rob Rodrigues
    Prodigy 30 points
    Hi Rob,

    thanks for your reply.
    The datasheet of the DP83849 unfortunately does not show my scenario: AC coupling of the RX path. So I guess the mentioned termination won't work as the DC offset will be around 1,3V instead of the 2V plus a swing of +- 0,4V. But your are right, this depends on the receiver needs.
    But as i couldn't find the specification (means high low levels) of the receive pins in the datasheet it s not clear for me what to do.
    It would be great if you can share these values.
    By the way, is there a change that you provide me a spice model for the TX lines of the DP83849? So i could simulate the signal integrity at receiver side.

    Best regards
    Benjamin
  • 0 in reply to Benjamin Schmidt25
    TI__Mastermind 26320 points
    Hi Benjamin,
    I hope you answers are getting thru FAE. I am closing this thread.


    Regards,
    Geet
  • 0 in reply to Geet Modi
    Prodigy 30 points

    I hope so, too. but so far it doesn't seem to get a satisfying answer :/
    Also for other users it would be great to get the answer here to this issue.
    Had the same problem with the thread mentioned in my first question. There the solution/answer isn't also visible. From my point of view this is not the kind a forum/community should work.

    regards Benjamin