TUSB1310: about layout for TUSB1310

1. TX(ref to TX_CLK) and RX(refer to PCLK), should they do equal trace independently?
yes, TX and RX data pin can do equal trace independently

2. TX_DATA&TX_DATAK and TX_CLK need do equal trace, what's the length difference could be? is there other signal need be equal to TX_CLK?
less than 10 mils should be ok, TX_Electrical and TX_compliance need to be equal too,

3. TX_DATA, TX_DATAK and RX_VALID need be equal with PCLK, what's the length difference could be? is there other signal trace need be equal to PCLK?
RX_DATA, RX_DATAK and RX_VALID need be equal with PCLK, less than 10 mils difference should be ok. RX_status need to equal trace too.

4. TX_CLK and PCLK trace need be qual, is there skew requirement?

TX_CLK and PCLK trace don't need equal trace.

5.should they do equal trace length for control and status signals? if yes, which clk should be the reference?
control pin need to do trace length for control too, PCLK should be the reference

hi Brian,

thank you for the reply!

for #2 &#3  10mil seems too tight, is 100mil ok? because 100mil is only 1% for the 4ns cycle. tks a lot!

Hi  Brain，

thank you for the reply!

what do you mean by TX_COMPLIANCE? it is not shown in the d/s.tks!