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DS90UH949-Q1: How to refresh EDID

Nao
Genius 4905 points
Part Number: DS90UH949-Q1
Other Parts Discussed in Thread: ALP

Hi, E2E members

Our customer is evaluating DS90UH949.
They want to use internal EDID mode in UH949.

As you know, the general sequence is here.
1. Power on the UH949.
2. Write EDID to Internal SRAM from ALP that uses I2C.
3. Connect HDIM.
This sequence works fine.

But we can't confirm correct EDID in the following sequence.
1. Connect HDIM.
2. Power on the UH949.
3. Write EDID to Internal SRAM from ALP that uses I2C.

HDMI source got Internal Pre-Programmed EDID in this sequence.
I think we need to refresh EDID after #3.
So, could you please tell me how to refresh EDID?

Regards,
Nao

  • 0
    TI__Mastermind 21685 points
    Hello Nao,

    There's an example script in the following folder that shows how to load EDID and read back

    C:\Program Files (x86)\Texas Instruments\Analog LaunchPAD v1.57.0010\Profiles\FPDL3Base\edid_load.py

    Please try.

    thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    I tried it.

    1. Connect HDIM.
    2. Power on the UH949 EVM.
    3. RUN edid_load.py for loading EDID

    I could confirm to change the EDID data in internal SRAM,
    but HDMI source (PC) side could not change the display information.

    Hence I think HDMI source (PC) side needs to reload and refresh EDID data after #3.
    So, could you please tell me how to refresh EDID from UH949 side?

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Nao,

    Through EDID display communicates its capabilities to HDMI source device. Please refer to Data Sheet section "8.3.4 Extended Display Identification Data (EDID)".

    For writing to EDID and changing what is stored in there by default (default setting for EDID is listed at top of page 19 in the 949 datasheet), you can either use DDC I2C interface or I2C interface with APB indirect register access reads and writes.

    The script you used above uses APB indirect register access reads and writes. FYI, the calls board.EDID_Write and board.EDID_Read are implemented using APB indirect register access.

    To initialize EDID from PC or an external MCU you can use the DDC I2C interface.

    Please give more information on the customer setup.

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points

    Hi, Vishy

    Our customer want to use Internal EDID (SRAM) mode on their system.
    Because they want to use their original EDID.

    I guess the general sequence is as follows on the system.

    The scenario 1.
    1. Turn on the system (UH949EVM).
    2. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    3. Connect HDMI cable.
    4. HDMI source (PC) read EDID from UH949. (Internal SRAM has our original EDID.)
    This sequence works fine.

    However user might turn on the system after connect HDMI cable.
    In this case, sequence is as follows on the system.

    The scenario 2.
    1. Connect HDMI cable.
    2. Turn on the system (UH949EVM).
    3. HDMI source (PC) read EDID from UH949. (Internal SRAM has Pre-Programmed EDID.)
    4. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    5. we need to reload our original EDID on internal SRAM from HDMI source (PC) side, but not could...

    In this case, HDMI source (PC) read the EDID before write our original EDID on the internal SRAM of UH949.
    HDMI source got Internal Pre-Programmed EDID in this sequence with #3.
    Hence I guess HDMI source (PC) side needs to reload EDID data after #4.

    So, we would like to know how to reload the EDID on the HDMI source (PC) side from UH949 side.
    Please let me know, if you have more better idea on this scenario 2.

    Regards,
    Nao

  • 0 in reply to Nao
    TI__Mastermind 21685 points

    >>>5. we need to reload our original EDID on internal SRAM from HDMI source (PC) side, but not could...

    To initialize EDID from PC or an external MCU you have to use the DDC I2C interface. This is a dedicated I2C interface for external graphics processor to access internal EDID SRAM.  See below typical application block diagram below

    As part of HDMI control we have DDC_SDA, and DDC_SCL. PC/graphics processor can connect through this dedicated I2C and access EDID SRAM. Also, note I2C ALP connects through is on the right and is different.

    I am assuming you are using DDC_SDA and DDC_SCL to program from PC. Also, note there's a strap selection to enable EDID access via DDC I2C. Also, note DDC I2C address is selected in register 0x51. What DDC I2C address are you using to access? Also, you can modify EDID config registers (CFG0 and CFG1) if you see DDC I2C access issue.

    Let me know if you have additional questions.

    Thanks,

    Vishy

  • 0 in reply to Vishy Viswanathan
    Genius 4905 points

    Hi, Vishy

    I understand the difference of DDC I2C and I2C line.

    Could you please tell me correct sequence of using "8.3.4.2 Internal EDID (SRAM)" mode that is TI assuming, when we do the our the scenario 2?

    - The scenario 2
    1. Connect HDMI cable.
    2. Turn on the system (UH949EVM).
    3. *****
    4. *****

    Regards,
    Nao

  • 0 in reply to Nao
    TI__Mastermind 21685 points

    Nao,

    For scenario 2, please try the following sequence:

    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    2. Connect HDMI cable.
    3. Turn on the system (UH949EVM).
    4. HDMI source (PC) read EDID from UH949. (Internal SRAM has Pre-Programmed EDID.)
    5. HDMI source (PC) write EDID over DDC I2C interface using default address 0xA0

    Thanks,
    Vishy

  • 0 in reply to Vishy Viswanathan
    TI__Mastermind 21685 points
    Nao,

    For scenario 2, please try one other sequence as below. This is the same as the one you were doing before but I would like to see if doing a hdmi reset helps.

    1. Connect HDMI cable.
    2. Turn on the system (UH949EVM).
    3. HDMI source (PC) read EDID from UH949. (Internal SRAM has Pre-Programmed EDID.)
    4. Write original EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    5. Do hdmi reset (set bit 4 in register 0x01)
    6. Check HDMI source (PC) read original EDID from UH949.

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points

    Hi, Vishy

    The following sequence works fine in our scenario 2.
    Does it correct sequence?

    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    - MODE_SEL0 is #1
    - MODE_SEL1 is #5
    - IDx is #1
    2. Connect HDMI cable.
    3. Turn on the system (UH949EVM).
    4. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    5. Clear EXT_CONTROL (0x54[7]).

    Regards,
    Nao

  • 0 in reply to Nao
    Genius 4905 points
    Hi, Vishy

    Thank you for your additional information.
    Internal SRAM is clear, if do hdmi reset (set bit 4 in register 0x01).
    This sequence does not work in our scenario 2.

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    >>>>The following sequence works fine in our scenario 2.
    >>>>Does it correct sequence?

    It's fine to override/modify the strapped value as you show.

    >>>>Internal SRAM is clear, if do hdmi reset (set bit 4 in register 0x01).
    >>>>This sequence does not work in our scenario 2.

    In above sequence, instead of hdmi reset please try in same register Digital Reset0 (reset entire digital block except registers)

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    Internal SRAM is clear too, if do Digital Reset0 (reset entire digital block except registers)
    This sequence does not work in our scenario 2.

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Nao-san,

    Thanks for checking. Let me know any additional questions.

    Regards,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    I will tell our customer as following sequence.

    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    - MODE_SEL0 is #1
    - MODE_SEL1 is #5
    - IDx is #1
    2. Connect HDMI cable.
    3. Turn on the system (UH949EVM).
    4. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    5. Clear EXT_CONTROL (0x54[7]).

    I can close this E2E, if you do not have more test scenario.

    Regards,
    Nao
  • 0 in reply to Nao
    Genius 4905 points
    Hi, Vishy

    I have one more questions.
    According to the datasheet (10.1 Power Up Requirements And PDB Pin),
    the power up sequence is "all supplies have settled, activate PDB, then apply HDMI input."

    This scenario 2 is connecting HDMI before power up all supplies. Is it OK?

    Regards,
    Nao
  • 0 in reply to Nao
    Genius 4905 points
    Hi, Vishy

    Do you have any update?

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Nao-san,
    Power up sequence in Data Sheet is right. We have to apply HDMI input after the power is stable and PDB is activated. Otherwise HDMI input can get messed up. I checked that's the correct use case (applying hdmi input after power and PDB).
    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points

    Hi, Vishy

    Thank you for your reply.
    I understand that recommendation sequence is applying HDMI input after power and PDB in UH949.
    However, there is a possibility that HDMI cable connect before power and PDB in our customer system.
    I guess almost HDMI system have same use-case. Could you check we can use this use-case?


    Regards,
    Nao

  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Hello Nao-san,

    Following is the HDMI Connection Sequence
    1. HDMI source outputs +5V power (RX_5V) to HDMI sink
    2. Source waits for hot plug detect (HPD) to be asserted
    3. Source reads the sink's capabilities in the sink's EDID

    If UH949 is powered later, HDMI connection sequence can get messed as steps 2 and 3 are going to fail. Also, note there could be an external remote EEPROM (section 8.3.4.3) which means after power up remote EDID has to be read before sink can respond to EDID capabilities.

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    Thank you for you reply.

    #1. Is there no problem in HW side if we connect HDMI cable before UH949 is powered?

    #2. Our system sequence is here.
    Is there a possibly of HDMI connection sequence can get messed?

    - Case.1
    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    - MODE_SEL0 is #1
    - MODE_SEL1 is #5
    - IDx is #1
    2. Connect HDMI cable.
    3. HDMI source outputs +5V power (RX_5V) to HDMI sink(UH949).
    4. Source waits for hot plug detect (HPD) to be asserted
    5. Turn on the system (UH949EVM).
    6. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    7. Clear EXT_CONTROL (0x54[7]).
    8. UH949 asserte hot plug detect (HPD).
    9. Source reads the sink's capabilities in the UH949's EDID.

    - Case.2
    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    - MODE_SEL0 is #1
    - MODE_SEL1 is #5
    - IDx is #1
    2. Turn on the system (UH949EVM).
    3. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    4. Clear EXT_CONTROL (0x54[7]).
    5. Connect HDMI cable.
    6. HDMI source outputs +5V power (RX_5V) to HDMI sink(UH949).
    7. Source waits for hot plug detect (HPD) to be asserted
    8. UH949 asserte hot plug detect (HPD).
    9. Source reads the sink's capabilities in the UH949's EDID.

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Nao,

    I got more clarification: The DS90UH949 may be initially configured using external control prior to enabling the internal Bridge Control module. By setting Mode_Sel0 and Mode_Sel1 as #1, #5, we disable internal bridge control function which disables initialization of the HDMI receiver. Then you program EDID structure and other configuration options from I2C bus. Finally you set the EXT_CONTROL bit (0x54[7]) to 0. This activates the Bridge Control module to begin control of the HDMI to FPD3 bridge function.

    With above understanding, both cases you describe above should work as after "Clear EXT_CONTROL (0x54[7])" HDMI receiver is initialized which results in assertion of hot plug signal. In Case #1, source has to wait for HPD to be asserted without timing out or getting messed up versus Case #2 that is avoided.

    One change, I suggest in your sequence is to check for "INIT_DONE" (0x50[4]) bit to be set before you write EDID.

    Thanks,
    Vishy
  • 0 in reply to Nao
    Genius 4905 points

    Hi, Vishy

    Thank you for your reply and additional advice.

    - Case.1
    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    - MODE_SEL0 is #1
    - MODE_SEL1 is #5
    - IDx is #1
    2. Connect HDMI cable.
    3. HDMI source outputs +5V power (RX_5V) to HDMI sink(UH949).
    4. Source waits for hot plug detect (HPD) to be asserted
    5. Turn on the system (UH949EVM).
    6. Check INIT_DONE (0x50[4]) = "1".
    7. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    8. Clear EXT_CONTROL (0x54[7]).
    9. UH949 asserte hot plug detect (HPD).
    10. Source reads the sink's capabilities in the UH949's EDID.

    - Case.2
    1. Ensure Configuration Select (MODE_SEL[1:0] settings) is set for "EXT_CTL: External HDMI control from I2C interface pins" (Refer Section 8.4.1 of the Data Sheet)
    - MODE_SEL0 is #1
    - MODE_SEL1 is #5
    - IDx is #1
    2. Turn on the system (UH949EVM).
    3. Check INIT_DONE (0x50[4]) = "1".
    4. Write EDID to Internal SRAM of UH949 from ALP or on-board MCU that uses I2C.
    5. Clear EXT_CONTROL (0x54[7]).
    6. Connect HDMI cable.
    7. HDMI source outputs +5V power (RX_5V) to HDMI sink(UH949).
    8. Source waits for hot plug detect (HPD) to be asserted
    9. UH949 asserte hot plug detect (HPD).
    10. Source reads the sink's capabilities in the UH949's EDID.

    How about my question #1?
    #1. Is there no problem in HW side if we connect HDMI cable before UH949 is powered?

    Regards,
    Nao

  • 0 in reply to Nao
    TI__Mastermind 21685 points
    How about my question #1?

    I thought this is covered in your case 1. Important you use EXT_CTL (Mode select #1, #5) as described above.

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    Sorry for confusing you.
    The UH949 get some inputs from HDMI cable (RX_5V etc...) at Case.2 before power-on.
    My question means that is it no problem in UH949 HW side.

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Nao,

    >>>The UH949 get some inputs from HDMI cable (RX_5V etc...) at Case.2 before power-on.

    I think you mean Case 1, not Case 2. That's why I commented in Case #1, HDMI source has to wait for HPD to be asserted without timing out or getting messed up versus Case #2 that is avoided. It is no problem in UH949 HW side.

    Thanks,
    Vishy
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points

    Hi, Vishy

    Thank you for your quick reply.
    YES. It's a typo. Sorry.
    I will tell me customer these 2 sequence of case.1 and case.2.

    Thank you for your a lot of advice.
    I can close this E2E thread after I will check by UH949 EVM.

    Regards,
    Nao

  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    I could check these sequence by UH949 EVM.
    I can close this E2E thread. Thank you very much.

    Regards,
    Nao
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    Thank you for everything.

    Regards,
    Nao
  • 0 in reply to Vishy Viswanathan
    Genius 4905 points
    Hi, Vishy

    Thanks.

    Regards,
    Nao
  • 0 in reply to Nao
    TI__Mastermind 21685 points
    Making the thread status closed. Please don't reply. Thanks.