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DS90LT012AQ-Q1: LVDS input voltage but the receiver is powered down?

Part Number: DS90LT012AQ-Q1


Can I inquire if the DS90LT012AQ-Q1 is capable of having LVDS input voltage / signaling present but the receiver is powered down?

What would be the leakage on the TTL output in this scenario?

example scenario would be to see if this can serve as a buffer between two boards where the driving source could be powered while the receiver is unpowered.

Can you help me confirm if this receiver is capable?


  • Hello Michael,

    This device should be capable of handling this situation. The leakage on the LVDS inputs is small and is specified in the datasheet (IIN with VDD=0 is 20 uA max). I don't have a spec on the leakage at the TTL output, but I expect it to be small, and there shouldn't anything driving that output in this scenario anyway.