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SN65LVDS33-EP: High Impedance Guarantee

Andrew Hermann
Prodigy 10 points
Part Number: SN65LVDS33-EP

I just wanted to confirm that the only way to guarantee a high impedance state at the output is to power the device and disable the output.

  1.  Is it required to drive both of the enables to put the device in High Impedance at the Output?

  2. Can I just toggle the G pin to enable and disable the output?, Do I need to tie the Gbar pin to Vcc in this scenario for operation?

  3. If the part is run at a VCC of 3.0V what are the VOH Min and VOL max values?

  • 0
    TI__Guru 62930 points

    Andrew,

    This device does not have Ioff, or PU3S circuitry to insure that outputs are high impedance when  off, or during power up.

    So, yes, device needs to be powered and outputs disabled.

    1) Correct.  Other states in the truth table are shown in the function table on page 2.

    2) Based on my interpretation of the table, you can tie G low, and toggle Gbar high to disable, and low to enable.

    3) VOH min and VOL max are based on worst case conditions, so the limits in the datasheet are based on 3V.  This would result in 2.4v VOH min, and 0.4V VOL max both with 4mA load.

    If this answers your question, please click "Verify it as the answer"
    Regards,
    Wade