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DP83825EVM: MDI derived clock

Part Number: DP83825EVM

Helo team,

I am writing to ask if it was possible to have some additional information regarding a sentence in the description on page. 1 of the Datasheet of the component of which we do not find reflected in the rest of the datasheet.
In the above description it is said that if the object is set in Master mode "It provides 50-MHz output clock in RMII Master Mode. "This clock is synchronized to MDI derived clock to reduce the jitter in the system.". We would be very interested in the highlighted part but we did not find any feedback in the datasheet except for paragraph 8.3.6 where we talk about Clock Output and there is a Recovered Clock without further explanation. We also noted that in the new revision of the document (ed. A of August) this paragraph disappeared.
Is it possible to have some information about this?

Thank you and best regards,


  • Hi Adrian,

    Thanks for pointing this out. In our most recent revision of the datasheet, we removed that section as the synchronized clock output is actually not a feature of the DP83825. In our next revision, we will be sure to remove the sentence you highlighted as it is a typo.