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TVP7002: TVP7002 input signal issue

Part Number: TVP7002
Other Parts Discussed in Thread: THS8200

Currently TVP7002 is used to collect VGA signals. Due to the embedded synchronization information in TVP7002, when FPGA analyzes YUV data at present, according to the relevant information of SAV and EAV, the analyzed data has the problem of one line more than the valid line number. For example, 1280*1024@60Hz acquisition, should be normally 1024 lines, but now 1025 lines. As the board also collects HDMI signals, the YUV of HDMI and VGA come out, and FPGA uses the same set of codes. Currently, the number of HDMI signal collection lines is correct, but VGA has the problem of one more line. Please help me to see what the reason is and the solution.  Thanks very much!

  • Hi Piero,

    I have notified our expert regarding your question. But note that this TVP7xxx device support is extremely limited, thus not sure if he can help you. You may also search the E2E forums for archived posts of previous discussions which may help address your questions.


  • Piero,

    It sounds like you don't have the TVP configured correctly. Please have a look at the TVP7002 + THS8200 EVM kit setup files available from the following location...

    In the file you will find 'setup files' which contain the required configurations settings for the TVP for each of the possible video formats.

    Check your configuration against these settings.



  • I studied the datasheet of TVP7002,and found that the points inserted by SAV & EAV can be got by setting TVP7002 related registers.

    Actually there were 2 boards with the same design except that TVP7002 chips were from different batches.

    According to the configuration 1080P60HZ showed in Table 8(Register 44h~49h) ,I got the right lines on the 2nd board (1024)but the wrong lines(1023) on the 1st board. I don't know why. I will make a A/B replace test later. Or can you give some advice about the phenomenon?


  • I can't really think of a reason why the devices would behave differently with the same register programming. Counting lines is a digital process so the only thing that makes sense is that they are getting programmed differently somehow.

    Can you read back all the registers to make sure that there isn't something going wrong in the programming sequence?



  •      Thanks for your help! Now the issue was resolved. We added an 1nF capacitor to VSYNC pin before, and configured Register 0x44 & 0x46 one less than 0x45 & 0x47. But according to the default config, it should be the same value for 0x44 & 0x55, and 0x46 & 0x47.  If the 1nF capacitor was removed from the board, the line# will be right value according to our setting.

          But I have such a question all the time,that is, why there is a close relationship between the VSYNC and EAV&SAV mechanism? I will be very thankful if you can help explain it. thanks!

  • The TVP uses the VSync to reset an internal counter that counts lines. This counter increments on HSync transitions.

    When V & H transition at the same time in the analog signal it is possible that sometimes the VSync is slightly ahead of the HSync and other times it is behind. Adding the capacitor both filters noise and also ensures that the VSync is after the HSync.



  • Do you have the recommended filter on the VSync signal as per the application circuit Figure 8 in the TVP7002 datasheet?

    i.e. 300R resistor and 1nF capacitor?