SN65HVD888: Polarity Correction Related Questions

Hi Patrick,

We'd be happy to help!

1) The polarity-correcting mode is entered only when VID < -100mV and t > 76ms and DE = low. Is my understanding right?
Polarity correction occurs when pins DE and /RE are both low and the bus has been held in a constant known state (Vid is not in range of Vit) for t > tfs. This is outlined in section 8.3.2 in the datasheet.

2) Is the polarity-correcting only enabled after each power-up or will it repeat if the above three conditions are valid during normal operation?
Polarity correction only depends on the above conditions. Time since power-up (t > enable times) does not impact this feature. This allows polarity correction to take place if another driver on the bus is enabled after the receiver on this device has been active for some time.

3) About the fail-safe resistor value selection, if the VID needs to < -100mv to enable the polarity-correcting in idle state, why Table 3of the datasheet lists sets of combination that is not? eg. 13mV, 29mV.. I'm confused..
For polarity correction to occur, Vid must be held in a known state for t > tfs. This could be positive or negative Vid from the perspective of the device (if negative, it will switch so it is seen as positive). |Vth| has a MAX of 100mV. Table 3 shows a variety of pull-up/down resistors that can be used with 54-Ohm termination and what Vid voltages they will provide. In noisy environments, it is good to keep this above |Vth| MAX. In power sensitive applications, a lower Vid may be selected to rely on internal fail-safe biasing with more consideration going into what noise may be present on the bus.

4) My customer has used a termination resistor- 120ohm and 1K/1K fail-safe in SN65HVD3082 (host) side but no termination at SN65HVD888 (slave) side. And is fail-safe resistor value OK?
Vid in failsafe conditions can be calculated by assuming that the bus is floating and treating the pull-up/down resistors and termination as a voltage divider. However, I would recommended to use termination on both ends of the RS-485 bus. This will dampen signal reflections and enables the receiver at the far end of the bus to receive maximum power. Again, considerations here can be made in power sensitive applications. Take a look at the following article for more information:

RS-485 basics: When termination is necessary, and how to do it properly

5) From my understanding of 888's correction scheme, I would like to raise another way to enable polarity correction and can you check if I'm right?
If the SN65HVD3082 (host) initially pulls DE high, and D to be H after power up, it gives the BUS a solid differentiated state for the SN65HVD888 to recognize. 76ms later, SN65HVD888 should be able to correct the polarity if reversed. Is that right? If yes, any potential risks?
Yes, this method of the driver sending a sort of training pulse would result in the receivers correcting their polarity before data transmission starts. However, when this correction occurs, the R pin on the receivers will switch from outputting a LOW to a HIGH (see Figure 14). This should be taken into account when reading information with slave devices.

I hope you find this information useful. Let me know if you have any more questions.

Regards,
Eric