If using the Ethernet PHY for 100Base T, is it necessary to control MDC and MDIO with a processor / CPLD/ FPGA? Can the pins float or should they be pulled-down / pulled-up?
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If using the Ethernet PHY for 100Base T, is it necessary to control MDC and MDIO with a processor / CPLD/ FPGA? Can the pins float or should they be pulled-down / pulled-up?
Hi Juan,
DP83867 provides few options to control the features using bootstrap resistors. If all the features that you need are available on the bootstrap resistor pins then you can skip MDIO-MDC connections. For using other features MDIO-MDC should be used. I would recommend connecting a pull up resistor on MDIO pin as mentioned in the datasheet and at-least connect test points to MDIO-MDC. Register access is a important tool for prototype validation and debug.
-Regards
Aniruddha