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FPC401: Default I2C addresses on the device look to be in the reserved I2C range?

madphysics
Prodigy 90 points
Part Number: FPC401

Hi,

We're looking to use the FPC401 on our design and looking at the data sheet the device powers up with a default address of 0x1E in 8bit, (0xF in 7bit). Also, the down stream devices are placed at 0xF0 0xF2 0xF4 0xF6 0xF8 0xFA 0xFC 0xFE, which seem to make to the address space in 7bit as 0x78,0x7A,0x7C,0x7E

I was under the impression that these addresses are reserved in I2C space for 10bit or future expansion purposes? Our system will have the FPC401 on a shared I2C bus and I am just worried about potential issues with other devices on the system. We have a mix of IO Expanders, I2C Mux's, TI Retimers and other things on the same bus.

My Initial thought is to write to the FPC401 as soon as possible before accessign the down stream QSFP modules and re-assign it's address, however it is the only device on the bus, so that means it looks like the last one on the chain (CTRL3 and CTRL4 both tied to ground) so is fixed to that I2C mapped address?

I'd appreciate any thoughts.

Best Regards

Marc.

  • 0
    TI__Guru* 88765 points

    Hi Marc,

    Since you are using a single FPC401, we need to tie CTLR3 and CTRL4 to GND and we have to use addresses 0xF0, 0xF2, and etc as you noted for downstream SFP ports. In this case, your other I2C devices would use addresses other than 0x1E. Given you are using default addresses and you have a single FPC401 this means there is no need to re-assign these addresses.

    Regards,, Nasser 

  • 0 in reply to Nasser Mohammadi
    Prodigy 90 points

    Hi,

    My worry was the fact that according to I2C specs the following were reserved.

    Address R/W Notes
    111 10XX X 10-bit slave addressing
    111 11XX X Reserved for future purposes

    There is some code in the linux i2c device drivers that have things like

           if (addr < 0x08 || addr > 0x77)
                return -EINVAL;
        return 0;


    I was a bit worried that other driver checks would stop me accessing the downstream ports. We might just try it and see once the hardware is built.

     

    Regards

    Marc.

  • 0 in reply to madphysics
    TI__Guru* 88765 points

    Hi Marc,

    I know this has not cause any issue for other customers.

    I close this thread and please let us know if there is anther question.

    Regards,, Nasser