Hi team,
My customer is using this device to convert single end LVPECL (SD of OWR-22XX) to CMOS level to support DP83822 LED1 pin. When I connect SD to D0, D0/ to GND, the output will be high all the time. I think this violates the VCM (1.2-3.3V) requirements. Do you have any solution to solve this problem? Thanks.
Hi,
There needs to be a pulldown resistor to GND on the SD signal as shown in the OWR datasheet. The D0# signal on the SN65EPT23 must not be set to GND. The SN65EPT23 includes circuitry to set the D0# input to Vcc/2, however this may not be an ideal reference voltage for level shifting the SD output signal. Unfortunately there is not any information about the exact output levels of the OWR SD output when using a 3.3V supply. I am assuming a 3.3V supply since your customer is looking at the SN65EPT23 which is 3.3V.
If the output specifications are also valid for a 3.3V supply, you should setup an external bias to place the D0# input at ~ -1.325V relative to Vcc. This is in the middle of the maximum VOL and minimum VOH specifications of the SD output. An example resistor divider to achieve this voltage on D0# would be a 1.33K pullup and 1.97K pulldown.
Regards,
Lee
