Other Parts Discussed in Thread: LMH0395, , LMH1218EVM
Hi, I would like to understand how a previous reported issue concerning poor jitter performance on the reclocked output of the LMH0318 was resolved. The solution was not mentioned in the thread and I am experiencing a very similar issue. In our design the data path involves using a LMH0395 cable equalizer to receive an SDI stream. Then one output of the LMH0395 feeds into an FPGA for further analysis and the second output drives a LMH0318 reclocker device to generate a re-timed output. I am using a Phabrix SXe unit to monitor the output of the LMH0318. The Phabrix unit is measuring 0.14UI of jitter. If I reconfigure the LMH0318 to send out raw data rather than reclocked data, the jitter performance improves to 0.08UI as does the eye diagram. So it appears the reclocked data presents a worse jitter performance. Changes to register 0x03 (EQ_boost) or even trying to bypass EQ boost for 270 MHz in register 0x0D seem to have no effect.
Many thanks,
Alan.