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TCAN1043DEVM: transmission speed tolerance at 500kbps

Ben Wadsworth1
Prodigy 20 points
Part Number: TCAN1043DEVM
Other Parts Discussed in Thread: TCAN1043

Are there guidelines on the tolerances achieved at the different transmission speeds for TCAN1043DRQ?

For my project I need to confirm to our customer that the transmission speed tolerance is no more than 0.4% at 500kbps.

  • 0
    TI__Guru 62920 points

    Hello Ben,

    The TCAN1043 is an analog device without an internal clock signal, so it's output toggling rate will just match the input toggling rate - it is not capable of introducing frequency offsets.  If you wanted to ensure frequency tolerance of at least 0.4%, that would be more a limitation of the reference oscillator that is used to generate the CAN clock in the CAN controller used in your application.  Please let me know if this doesn't make sense or if you have any further questions.

    Regards,
    Max

  • 0 in reply to Miguel Robertson
    Prodigy 20 points

    Hello Max,

    Thank you for responding. I do understand your response, I apologise if my question left ambiguity.

    I believe our customer is suggesting that the CAN Transceiver itself should not create a tolerance greater than 0.4% different to the CAN controller oscillator, hence the tight tolerance. From what you're saying the tolerance of the transceiver itself will be negligible?

    Thanks again.

    Regards,

    Ben

  • 0 in reply to Ben Wadsworth1
    TI__Guru 62920 points

    Hi Ben,

    Since the transceiver's outputs will follow its inputs, it is not able to introduce a frequency offset.  For example, when TXD transitions low the CAN bus will transition to a dominant state after a certain propagation/transition delay.  When TXD transitions high the CAN bus will similarly transition to a recessive state after a certain propagation/transition delay.  If there are mismatches in these delays it could result in short term phase variation (sometimes referred to as duty cycle distortion or simply jitter), but not a frequency offset (which would generate an accumulating phase error).  Instead, any slight shortening of one bit state will be accompanied by a lengthening of the next bit state by the same amount.  This means that there is no long-term phase drift and so the average frequency error is 0%.

    Regards,
    Max