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DS92LV2421: Error bit appears according to input video signal pattern

Part Number: DS92LV2421
Other Parts Discussed in Thread: DS92LV2422,

Hello~

I composed Serdes system with DS92LV2421+DS92LV2422 pair.

Input video source is Raspberry pi zero, and micro SD card has video images.

Resolution 1024*768RGB. (RGB888, Pclk 32 MHz, about 35 fps)

Output is passive matrix LED panel + LED driving circuit.

Output signals of DS92LV2422(R,G,B each 8bit, Hsync, Vsync, Pclk) are inputted in FPGA chip. 

And FPGA output signals are made in FPGA chip for passive matrix LED driving signals.

When case input images are Full whitel, Full R, Full G, Full B, Cross bar pattern W, Cross bar pattern R, Cross bar pattern G, Cross bar pattern B (not so much data switching patterns)

There are no error bits appeared.(PASS pin always high) and Display status is ok.

When case input signals have much data switching, (For example, Sunflower image)

There are several error bits are appered(Pass pin sometimes shows off status), So display status is sometimes trembled(Because all data is disappeared during error bit is appeared)

Above situation, what parameters could I adjust for normal operation?

Give me some advice.

If needed more information, reply on me.

Thank you for your cooperation.

  • Kwak,

    thank you to touch TI.

    From your issue description, it sounds this is on link margin robust design issue, not on the device level issue. please check:

    1. when video data has rich toggling messages, the on-board noise should become worse, can you try to optimize the on-board power supply noise filtering design?

    2. please analyze the total link margin, the d/s recommendation design is followed?

    3. can you try to use shorter cable for transmission if the transmission medium is cable?

    best regards,

    Steven