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DP83825EVM: To start with DP83825

Part Number: DP83825EVM
Other Parts Discussed in Thread: USB-2-MDIO

Hi Team,

My customer designed to use PHY in their product, and it is the first time for them to use PHY.

May I ask are there some routine for them to begin with DP83825 EVM?

Their objective now is to connect the EVM with Internet to see whether it could send/receive data.

We could use USB-2-MDIO to achieve W/R for PHY. May I ask whether we could offer a routine (configure sample) based on USB2MDIO tools for customer to refer?

I also sent them the user guide of DP83825 EVM. It seems too brief for them.

Thanks!

  • Hi Amelie,

    You need to look at datasheet for required configuration and usb2mdio's help in following link on how to write a usb2mdio routine :

    http://www.ti.com/lit/ug/snlu197/snlu197.pdf?&ts=1588936604614

    Do they want to connect a MAC with the phy in the present test or will they be ok with transfer of data by putting phy in reverse loopback. Kindly look at loopback options in datasheet and let me know what you find from customer.

    --

    Regards,

    Vikram

  • Hi Vikram,

    Thanks for your reply!

    I also found a 83867 Script as following.

    May I ask whether this script could run in 83825 EVM?

    Thanks!

    DP83867 100M test.txt
    // Title: DP83867 PRBS test
    // Company: Texas Instruments
    // Location: Santa Clara, CA
    // Developer: Ross Pimentel
    // Date: December 23, 2014
    // Force DUT 100Mbps, BIST, External Loop
    // Texas Instruments
    
    begin
    
    //delay 100
    001f 8000	// restart core
    0000 2100	// force 100Mbps, full-duplex
    0010 5008	// 5008 - mdi , 5028 - mdix
    
    // Enable BIST mode
    //echo BIST 
    0016 f008	// use termination outside RJ45//Continuous PRBS, Enable checker, Enable PRBS, Transmit 64 packets
    
    001f 4000
    //delay 200
    
    // loop 5
    // Reads GEN_STATUS
    // NOTE: First read clears LH, Second read has actual status
    // Value should be 0A40, PBRS checker locked and sync
    0017
    0017
    // NOTE: First read clears LL, Second read has actual status
    //0001 //bit 2 will give indication if we have link fails
    //0001
    0072 3 // lock & clear PRBS counters (byte 0x71 and erro 0x72) counters
    0071 // rd byte counter to observe bytes are indeed received 
    0072 // rd errors counter. should read 0
    // endloop
    
    0000
    
    end

  • Hi Amelie,

    The script you shared is for a particular configuration/test-case of 867 and hence not applicable to 825.

    Lets draw the block diagram after understanding the customer's wishlist:

    a. What will customer connect on the RJ45 connector side of 825?

    b. What will customer connect on the MAC side of EVM (RMII connector)

    c. What is the expected flow of data that customer wants to test? PC? -> To Evm -> To where?

    d. How will customer check whether its test case is passing or not?

    Also lets confirm whether customer will use 100Mbps mode or 10Mbps mode.

    Knowing all this will give us a starting point in finding the correct register settings for the customers to use the EVM.

    --

    Regards,

    Vikram

  • Hi Vikram,

    Thanks for your information.

    When I confirmed with customer that they need MAC+PHY solution, only PHY is not suitable for their application.

    I also confirm with BU that we don't have MAC+PHY chip, so I think this case could be closed.

    Thanks!