Hi,
I am using TCA9406 for level translation in multiple places in design. Unfortunately due to copy-paste error one of the them is also between two independent 1V8 domains, meaning that VCCB violates 2V3 requirement. The bus seems to be working fine (it is very slow @ 100kHz and both sides have external 1V8 pull-ups). Master is conencted to the A side while B side is slave only.
What are the possible consequences of running VCCB @ 1V8? Plan is of course to fix this in the next PCB spin, however, would be good to know what are the risks for this round of prototypes. Is there any part in DSBGA that would allow this "translation"?
Thanks
Petr