DS110DF410: Device Input Inquiry, Register Setting Information Request and Jitter Inquiry.

Hi TI Support,

I should preface that this question is part of an ongoing investigation. I have looked at several retiming products with an interest of generating PRBS patterns at 10.3125Gbps and 9Gbps so have explored several products.

Preface

Initially I was looking for a device that could output PRBS without ouputs.

My initial search involved looking at DS125DF410 but I found out that the PRBS generator on this could not be used with the VCO in free-running mode.

I then investigated the DS100RT410, which would offer the option of a free-running VCO but I then realised that for my requirements the data rates of the DS110RT410 would be more suitable (or the DS110DF410).

I have therefore decided to go for either DS110RT410/DS110DF410. However it is no longer my intention to use the VCO in a free running mode but instead to supply a clock to the inputs of the device.

Questions

So Firstly I wanted to know if it will be possible to generate PRBS data at 10.3125Gbps and 9Gbps synchronous to an input assuming that the input is a clock input to the channel input?

My intention for the 10.3125Gbps this would be a 644.53125MHz clock.

Secondly what would be a desirable jitter specification for a clock on the input pins?

Thirdly I was looking to find out what the absolute lowest PRBS line rate than can be achieved with this device assuming a synchronous clock input is?

From the datasheet I can see it is quoted at 8.5Gbps but I wanted to confirm this as there is a potential beenfit if we can generate PRBS patterns at 6Gbps.

I was also wanting to find out with regards to outputting a PRBS pattern at 9 Gbps assuming that the input frequency is tuned appropirately to a 16th (562.5MHz) what the PPM register input would have to look like? When I was trying to determine what would go into this register value and I use the calculation of Nppm = 9.0 * 1280 = 11520 so my hex would be 0x2D00. So I'd want to have group 0 and group 1 be the same. Group 0 set by registers 0x60 and 0x61 and the group 1 by 0x62 and 0x63. So the 0x60 = 0x00 but then I am not sure what happens with 0xD2 to be included in the 7 least significant bits of 0x61 and 0x63?

I also wanted to double check if the devices DS100RT410, DS110RT410 and DS110DF410 are pin compatible?

Summary

1. Can I generate synchronous PRBS outputs on a channel using a clock at the channel inputs to the device?
2. What would be desirable jitter specification for a PPM tolerance set to the generic 0xFF?
3. Is th absolute minimum of the device data rate 8.5Gbps as in the datasheet or can this be run at a lower rate?
4. Just looking for some clarification on what values I'd use for 0x61 and 0x63 for a 9Gbps frequency?
5. Double checking if devices DS100RT410, DS110RT410 and DS110DF410 and pin to pin compatible?

Thank you again for your time,

Best regards,

Sean Suttie.