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TCA9543A: Downstream ports SDA line stuck at Low Level

Part Number: TCA9543A
We've added TCA9543A in our Dual Camera project for connecting two OLED modules with the same I2C address to an I2C bus from the IMX6 processor. The OLED supported I2C IO voltage is 1.8V whereas the IMX6 I2C IO voltage is 3.3V. So, we use TCA9543A as a level translator too.
Please see the circuit below.
I2C_BUS_RST# is the 3.3VIO I2C mux Reset signal from the IMX6 processor.
I2C2_SDA: 3.3VIO I2C data signal from IMX6.
I2C2_SCL:3.3VIO I2C clock signal from IMX6.
SW0_I2C2_SCL: 1.8VIO I2C clock signal to OLED1.
SW0_I2C2_SDA: 1.8VIO I2C data signal to OLED1.
SW1_I2C2_SCL: 1.8VIO I2C clock signal to OLED2.
SW1_I2C2_SDA: 1.8VIO I2C data signal to OLED2.
Interrupt signals of TCA9543A are not used.
As per the system power sequence, VCC_1V8 comes before VCC_3V3.
The OLED has 4 power rails as below.
Initially we keep both channels of TCA9543A disabled.
As per the power sequence suggested by the OLED manufacturer, when we enable the VDD and VDDA supplies, the SW0_I2C2_SDA and  SW1_I2C2_SDA lines go to low state and donot come back to pulled up high state.
As we turn any of the channels of TCA9543A on, the  I2C2_SDA also go to this low state and the bus is in hang state and all devices in it disappear.
Please review our circuit of TCA9543A and share if anything to be corrected.
  • Hey Emil,

    • Decoupling caps present (good)
    • Pinout matches datasheet (good)
    • Vcc supports level translation/logic levels on bus (good)
    • Pull up resistors present (don't see main SDA/SCL pull ups but from description, they are likely present)
    • SDA/SCL net names match pin names (good)
    • Reset voltage meets datasheet specs (good)
    • Device address is correct (good)

    I don't see any issues involving the schematic with our device.

    I would suggest using a digital multi-meter to check to see if there is a short from SDA to GND with either a resistance check or continuity setting.

    One thing you could try is to give the clock line 8~16 clock pulses to see if this resets the state machine for the downstream slave.

    "As per the power sequence suggested by the OLED manufacturer, when we enable the VDD and VDDA supplies, the SW0_I2C2_SDA and  SW1_I2C2_SDA lines go to low state and donot come back to pulled up high state."

    Sometimes, the issue isn't the power sequence but the ramp rate. I would suggest monitoring the Vcc ramp rates of each and check with the manufacturer to see if the ramp rates are too slow/fast and may place the device in an unknown state when powering up.

    Thanks,

    -Bobby

  • Hello Bobby,

    Thanks for the analysis.

    It seems like the OLED is pulling the line low. We have updated the reset sequence and checked, but the issue didn't appear.

    So, it looks like the fix.

    Thanks again for the great help.

    Emil