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The 16X clock input can be at most 2 MHz. The degree of allowable frequency variation between the local clock and the serial baud rate is not characterized for this device since it is more of a system-level concern related to the UART data strobing. At the decoder level, frequency mismatches or jitter could result in short-term misinterpretations of the serial bit value. An example of this is shown in Figure 6 of the datasheet. Typically if the UART samples at the center of the expected bit period these short-duration glitches can be tolerated.