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SN65DSI85-Q1: SN65DSI85 single channel DSI to dual channel LVDS - only part of image shown on LVDS screens

Part Number: SN65DSI85-Q1
Other Parts Discussed in Thread: SN65DSI85, SN65DSI84

Hello,

We would like to use SN65DSI85 to split output from dsi on (sdm625) to 2 LVDS screens.

Screens have a resolution 1280x800.We tried to follow official FAQ "How to configure the SN65DSI84 and SN65DSI85 for single channel DSI to dual channel LVDS",

but result is that we can see image only on half of our screens.

1.timing from datasheet of our screens (AM-1280800N1TZQW-00H)

Here are the screenshots from DSI tuner:

and the result is:

DSI clock generated by cpu is 426.62M (as shown by sysfs output)

Did we understand correctly that in case of single channel to dual channel we need to put in regs 0x21 and 0x20 resolution of LVDS screen not double ?

Because if we put double (2560 instead of 1280 in regs 0x21 and 0x20) result is little better

Now 980 pixels from 1280 are visible

Thank you.

  • Hi Sergei,

    Single DSI to dual LVDS assumes that you will be connecting to one panel with dual LVDS inputs. For example, with your settings the assumption would be that you're connecting to one 1280x800 resolution panel, which is why the guide says to split the horizontal LVDS timing parameters in 2 - each output would handle 1/2 of the screen.

    However, you're connecting to two separate 1280x800 panels, so you will only see half the screen on each panel with your settings. For your case you need to configure the LVDS output as 1280x800 and the DSI input as 2560x800.

    Regards,

    I.K. 

  • Hello,

    Thank you for your explanation.Last image I attached in first message shows the output in case of DSI input of 2560x800.As you can see almost 1/4th of screen is missing.I will attach dsi tuner config for your info.

    Sergei

  • Please ensure that your DSI source settings are also updated to match exactly with the DSI85 settings.

    Regards,

    I.K.

  • this is what i have inside dsi file

            dsi_hx8394f_720p_dsi1_video: qcom,mdss_dsi_hx8394f_720p_dsi1_video {
                    qcom,mdss-dsi-panel-name = "hx8394f 720p dsi1 video mode dsi panel";
                    //qcom,mdss-dsi-panel-controller = <&mdss_dsi0>;
                    qcom,mdss-dsi-panel-type = "dsi_video_mode";
                    //qcom,mdss-dsi-panel-destination = "display_1";
                    qcom,mdss-dsi-panel-framerate = <60>;
                    qcom,mdss-dsi-virtual-channel-id = <0>;
                    qcom,mdss-dsi-stream = <0>;
                    qcom,mdss-dsi-panel-width = <2560>;
                    qcom,mdss-dsi-panel-height = <800>;
                    qcom,mdss-dsi-h-front-porch = <120>;
                    qcom,mdss-dsi-h-back-porch = <100>;
                    qcom,mdss-dsi-h-pulse-width = <100>;
                    qcom,mdss-dsi-h-sync-skew = <0>;
                    qcom,mdss-dsi-v-back-porch = <8>;
                    qcom,mdss-dsi-v-front-porch = <7>;
                    qcom,mdss-dsi-v-pulse-width = <8>;
                    qcom,mdss-dsi-h-left-border = <0>;
                    qcom,mdss-dsi-h-right-border = <0>;
                    qcom,mdss-dsi-v-top-border = <0>;
                    qcom,mdss-dsi-v-bottom-border = <0>;
                    qcom,mdss-dsi-bpp = <24>;
      qcom,mdss-dsi-color-order = "rgb_swap_rgb";
                    qcom,mdss-dsi-underflow-color = <0xff>;
                    qcom,mdss-dsi-border-color = <0>;//0
                    qcom,mdss-dsi-on-command = [05 01 00 00 78 00 02 11 00
    05 01 00 00 05 00 02 29 00];
                    qcom,mdss-dsi-off-command = [05 01 00 00 32 00 02 28 00
                                            05 01 00 00 78 00 02 10 00];
                    qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
                    qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
                    qcom,mdss-dsi-h-sync-pulse = <1>;//1
                    qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
                    qcom,mdss-dsi-lane-map = "lane_map_0123";
                    qcom,mdss-dsi-bllp-eof-power-mode;
                    qcom,mdss-dsi-bllp-power-mode;
                    qcom,mdss-dsi-lane-0-state;
                    qcom,mdss-dsi-lane-1-state;
                    qcom,mdss-dsi-lane-2-state;
                    qcom,mdss-dsi-lane-3-state;
                    qcom,mdss-dsi-panel-timings = [E2 36 24 00 66 68 28 38 2A 03 04 00];
                    qcom,mdss-dsi-t-clk-post = <0x02>;
                    qcom,mdss-dsi-t-clk-pre = <0x2A>;
                    qcom,mdss-dsi-bl-min-level = <1>;
                    qcom,mdss-dsi-bl-max-level = <4095>;
                    qcom,mdss-dsi-dma-trigger = "trigger_sw";
                    qcom,mdss-dsi-mdp-trigger = "none";
                    qcom,mdss-dsi-reset-sequence = <1 20>, <0 2>, <1 60>;

    }

  • I would like to have a confirmation that SN65DSI85 can accept dsi resolution of 2560x800 and it can be splitted to 2 LVDS screens with resolution 1280x800 each.

    Sergei

  • It can, yes.

    Can you try enabling the test pattern and see if parts of the screen are still not filled?

    Regards,

    I.K.

  • Test pattern works fine.

  • Please include an image of the test pattern.

    Also, please measure the line time on the DSI side with an oscilloscope similar to #4 in this FAQ: https://e2e.ti.com/support/interface/f/138/t/852871

    With your settings the line time should be 20.253 us

    Regards,

    I.K.