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SN65LVDT41: SPI LVDS not working?

Part Number: SN65LVDT41
Other Parts Discussed in Thread: DS90LV011A, DS90LV012A

Hi,

I am trying to extend my SPI bus by 24" using your sn65lvdt41 and sn52lvds14 driver IC's and I cannot seem to get things to work.  This is my setup:

( CortexM4 feather board from Adafruit, Ethernet feather wing from Adafruit and SPI bus speed is 12MHz )

1) The two boards talk correctly through SPI if hooked them up directly (6" jumper wires) to each other.  I can assign a IP address (for example: 10.0.0.8) to the ethernet board and read it back no problems.

2) I need to extend the SPI bus using an 24" ethernet CAT5e cable between your LVDS driver IC's  ( I created pcbs using your pcb designs in your data sheet to do this ).  When I add in this LVDS setup between the two boards above it will not assign an IP address anymore (I read back IP address 0.0.0.0).  The current SPI bus speed is 12MHz but I will need to go to 24MHz at the end of the day.

The SPI signals at both ends of the LVDS drivers look clean on the scope and I would expect it should work but it does not.  I would appreciate any ideas or thoughts on what the issue might be.

Thanks,

Jim

  • Hi Jim,

    Can you provide a simple block diagram for your system and the schematics for your boards? Can you also provide the oscilloscope screenshots of the waveforms (inputs and outputs)?

    Regards,

    I.K.

  • Hi I.K,

    Thank you for your reply.  I have attached the schmatics of the two proto boards (Master & Slave).  I am using a standard straight through 2 foot ethernet CAT5e cable between them.  I have unhooked my setup and will have to re-assemble to get scope pic's.  I will try to get the pic's sometime today.

    Thanks,

    Jim

    SPI Driver Master.sch

    SPI Driver Slave.sch

  • Hi I.K,

    Please find attached the block diagram of my setups and scope pics

    img_1153 = SCK (yellow master output, blue slave input)

    img_1154 = MOSI (yellow master output, blue slave input)

    img_1155 = MISO (yellow master input, blue slave output)

       LVDS Setup.pdf

  • Hi Jim,

    I'm not able to open the schematics (for some reason my viewer is giving me errors) - can you share a pdf version of them? 

    Those signals do look rather clean so it's strange that the setup is not working. Do you see any improvements if you use a lower a frequency or a smaller cable?

    Regards,

    I.K. 

  • Hi I.K,

    Sorry about the schematics please see attached pdf's.  I was at 24MHz and went down to 12MHz.  Without the lvds drivers I have successfully run up to 12" but any longer fails.  This is why I was looking at your lvds drivers to extend the spi bus.  I will try some lower spi bus speeds tomorrow.

    Best Regards,

    Jim

    SPI Driver Master.pdfSPI Driver Slave.pdf

  • Hi I.K.,

    In closer review I was chasing my tail... my bad.  My library was causing me some grief as the SPI clock was set to 24MHz.  When I set the library to 12MHz the boards now communicate but anything higher fails.  

    The problem, I need the SPI bus to run at 24MHz.  If my math is correct 250 Mbps / 8 bits = 31.25MHz.  Any thoughts or suggestions I am open to.

    One side question do your LVDS chips, play nice with others, and work with other devices on the same bus?

    Thanks,

    Jim

  • Hi Jim,

    Our LVDS devices seem to be working correctly as shown by the waveforms. This communication issue is probably due to excessive propagation delay from the addition of the LVDS signal path as well as the cable and SPI peripheral, which is limiting the maximum speed. LVDS can be used to extend the SPI bus but unfortunately there is a trade-off between distance and speed. The propagation delay further inhibits the speed.

    These particular devices can interface with any LVDS device complaint with ANSI/TIA/EIA-644 or ANSI/TIA/EIA-644A standard. For multiple devices on the same lane typically it will only work with other LVDS compliant with the ANSI/TIA/EIA-644A standard as that standard is the one that defines the multidrop interface.

    Regards,

    I.K. 

     

  • Hi I.K.,

    Yes, running at 12MHz SPI bus speed the waveforms look good.  Without LVDS and using 6" wire jumpers between the two boards I can run reliably at 24MHz.  

    I would agree with you if I was running through 10's of meters of cable but I am only running through a 2 foot cable?  The question of the day, will these IC's run the SPI bus at 31.25 MHz?  Is my math correct 250 Mbps / 8 bits = 31.25 MHz?  If not then do you have another solution that will run at higher frequency and get me where I need to be?

    Best Regards,

    Jim

  • Hi Jim,

    It's heavily dependent on the delay of the entire system. There is actually a reference design for SPI over LVDS using these parts: https://www.ti.com/lit/ug/tidued8/tidued8.pdf (max speed/distance is talked about in section 2.3.1.2). Due to the added propagation delay from the LVDS parts you won't be able to achieve the same max speed as you could without them. There are alternative parts that offer lower propagation delay (e.g. DS90LV011A + DS90LV012A) and should be able to support SPI at higher frequencies, though it would be best to test them in your system first. 

    As for the math, I'm not sure where your numbers are coming from (sorry, not as familiar with SPI itself as I am with our LVDS parts) so I can't really say whether or not it is correct. 

    Regards,

    I.K.