DS90UR910-Q1: DS90UR910 output signal is abnormal even lock pin and pass pin are in high status

Hello,

Could you let me know what serializer is used? What is the PCLK of the video?

When you say the you can display the content on a car monitor, is a different deserializer used? 

Hi, 

The serializer of car main unit is DS99R421, we already checked data sheet, it can compatible with DS90UR910 in Gen 2 mode. 

When we test input signal to display the content on car monitor, we use DS90UR124 as deserializer on another device.

Do you mean the PCLK of input video?

Yes, i would like to know the PCLK of the input video .

Best Regards,

Charley Cai

Hi, 

The PCLK of the input video is 33MHz. 

Best Regards

Hello,

Could you check if video resolution fall into the look up table listed in the datasheet?

7.3.5 Display Timing Requirements

Hi, 

Yes, the datasheet includes the input video resolution 800x480

Hello,

Could you help me check if VS, HS, and DE signal is supplied to DS99R421? 

Could you check if supplied VS and DE are active low or active high?

Could you please provide a register dump for the UR910?

Best Regards,

Charley Cai

Hi, 

1. Yes, VS, HS, and DE signal is confirmed to supply to DS99R421. 

2. The VS, HS, and DE are active low.

3. Here is the register dump for the UR910.

Best Regards

Hello,

The registers look like what you are writing to the 910. 

Could you read back all the registers from 0x00 to 0x3B after you program the device? 

Best Regards,

Charley Cai

Could you also let me know what signal is channel 2? It looks like active high signal. 

We may need to adjust the polarity if active high / low is flipped. 

Best Regards,

Charley Cai

Hello,

I think we are also seeing output on the scope. Where the pulse signal should be part of the LP state. 

Your scope may not have enough bandwidth to show the HS state.

Have you connected the UR910 to an SoC to check for output?

Best Regards,

Charley Cai

Hi, 

1. These are register value we read by Analog launch pad, are they appropriate?

2. Channel 2 is DE signal. 

3. Can you offer reference configuration for all registers, which include more details and descriptions? Because there are not enough details for all registers in the UR910 datasheet, so we don't know how to write some registers.

Best Regards

Looking at the registers, 0x01 was not written with 0x09. 

In which case, the device is not placed in backward compatibility mode. 

What is the CONFIG setting in hardware.

Best Regards,

Charley Cai

Hi

Yes, we know 0x01 should be 0x09 for Gen 2 mode, we did it before, but also not output, and then we back to the default value for registers, so the value we read are default value. 

For the Gen 2 mode output, besides the 0x01 register need to be 0x09, how about other registers, they just need to keep the default value or some of them also need to change the value? Can you offer us a complete register configuration list for Gen 2 mode which can guarantee normal output. Because some of the registers don't have enough description in the datasheet, so we can not confirm what value should we write for them.

Best Regards

Most of the registers can be left as default when your video matches the table 5 in datasheet.

You would need to configured 0x1, 0x2, 0x11 accordingly.

Could you double check the output with a high bandwidth scope? From your first picture, we were able to see LP state which indicated the 910 is outputting.

Best Regards,

Charley Cai

Hi, 

So we only need to configure 0x01, 0x02, and 0x11? And other registers just use default value?

Can you suggest to us what value should we write for 0x01, 0x02, and 0x11 if we need to work on Gen 2 mode?

And what is the minimum bandwidth to check the output normally?

Best Regards

Based on your configuration, you should set

0x01 to 0x09

0x02 is based on color mapping so you would need to pick the color mapping and pick the value correctly. 

0x11 should be 0x41 based on active low VS and active high DE.

For the speed you are running at, you would need at least a 1GHz scope.

Best Regards,

Charley Cai

Hi, 

When we wrote 0x80 for 0x11 register, we found this signal on the scope. If we wrote 0x41 as you suggest, no signal.

The difference is the csi-2 non-continues clock, only choose non-continues clock got output signal, is it normal?

Best Regards

Hello,

Actually from the Saleae screen shots earlier in this thread it looks like HS, VS, and DE are all active high signals from your video source. I think this is opposite of what was said in the thread, but can you please try using 0x11 = 0xC1?

Best Regards,

Casey 

Hi, 

When we use 0x11 = 0xC1, no any signal.

Only use 0x11 = 0x80, it showed signal like this. So this signal is correct for mipi csi 2? The frequency and the shape of signal are appropriate?

One more question, these are the data from input video source, after generate mipi csi 2, these data still same for mipi csi 2?

Best Regards

Hello,

It is quite hard to tell what is going on with this signal because your scope if far too low of BW to see any detail in the MIPI signal. The 910 is a pass through device which does not change video timing, so whatever timing was provided by the source side on the serializer will be passed through. But it should match the timing of one of the supported resolutions in the table. Please verify the output signal with the proper equipment which would be a MIPI CSI-2 analyzer 

Best Regards,

Casey 

Hi, 

Is it possible to show us pictures of the normal MIPI CSI-2 output signal from ur910 on your proper equipment? We want to know how it looks like and details of data lane and clock lane. And any proper equipment recommend?

Best Regards

Hello,

We currently do not have such a picture to be shared, but we use the following measurement equipment to decode and display CSI-2 during testing of 910 or other CSI-2 devices:

https://www.keysight.com/en/pd-2096011-pn-U4421A/protocol-analyzer-and-exerciser-for-mipi-d-phy-interfaces?cc=US&lc=eng 

You can see examples of what the trace decode looks like there

Best Regards,

Casey 

Hi, 

For the HS signal from DS90UR910, should we configure some registers for it to make it normal?

Because now when we pass the data lane of DS90UR910 to next chipset, which transform mipi to parallel RGB, the HS output is abnormal, seems not exist. 

How can we guarantee the HS from 910 is normal? Other DE, VS and clk are normal.

Best regards

I think you have gotten the HS signal to output with non-continuous clocking mode. Have you tried to use this setting to communicate with the CSI receiver? 

Could you provide some information on the receiver chip to see if they are compatible?

Would you need to make sure the DE, VS polarity are set correctly in the device.

You would need a higher speed scope to better analyze the HS signal since they are switching in high frequency.

Best Regards,

Charley Cai