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LMH1218: Selective Data Rate Lock Question

Part Number: LMH1218

Hi Team,

When the signal from FPGA is 12Gbps, some of the boards with LMH1218 recognize the signal to be 6Gbps and some of the boards to be 12Gbps when configured to automatically lock to all SMPTE data rates. However, if all LMH1218 is locked to 12Gbps, then all the boards can work normally with 12Gbps input signals.

So my questions are:

1. What are the possible reasons why some of the LMH1218 recognize the 12Gbps signal to be 6Gbps?

2. Will LMH1218 always work normally if locked to 12Gbps? We worry that it may not work with 12Gbps input signals even by locking the data rate.

Thanks and Best Regards!

Hao

  • Hi Hao,

    1). There are initialization steps for LMH1218 noted in data sheet and programming guide. As long as these are issued, device should be able to lock to 12G incoming data rates. It is possible if the equalization setting is not correct then we may not lock correctly.

    2). If device shows lock at 12G and there is good eye opening then it should work correctly. By good eye opening, we mean HEO >= 0.4UI and VEO>=185mV.

    Regards,, Nasser