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DS90UB921-Q1: 921/948 display splash

Part Number: DS90UB921-Q1
Other Parts Discussed in Thread: ALP

Hi team,

customer use 921/948 have display splash issue.

below is test result:

1. 1920x720-32@30fps, can display normally, don't see splash.

2. set 1920x720-32@60fps, display will splash. customer add a LED in LOCK pin of 948. In 60fps, the LED will blinked.

3. 948的MODE_SEL is :MODE_SEL0= Dual OLDI output (MAP_SEL = 1, OUTPUT_MODE[1:0] = 00)

MODE_SEL1 = (REPEATER = 0, MODE = 00, HIGH-SPEED = 5Mbps, STP)

Could you help to give some suggestions. one more infomation is that, with the same condition, 949/948 will be work properly, but 921/948 is not.

below is 921 dump reg and 948 reg value:

921:

       0   1   2   3   4   5   6   7   8  9   a   b   c   d   e   f    0123456789abcdef

00: 18 00 00 fa 80 00 68 40 40 00 00 00 05 00 00 00    ?..??.h@@...?...

10: 00 00 00 10 00 00 fe 5e a1 a5 00 00 00 00 00 00    ...?..?^??......

20: 00 00 25 00 00 00 00 00 00 24 00 a0 00 00 00 00    ..%......$.?....

30: 03 10 00 00 00 00 08 34 00 0a 20 21 00 00 f0 00    ??....?4.? !..?.

40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

50: 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ...............

60: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00    ....?...........

70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

c0: 00 00 80 00 78 00 00 60 40 00 00 00 00 00 00 00    ..?.x..`@.......

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

f0: 5f 55 42 39 32 31 00 00 00 00 00 00 00 00 00 00    _UB921..........

948:

       0  1    2  3   4   5    6  7   8  9    a   b   c   d   e   f    0123456789abcdef

00: 68 04 00 78 02 1e 00 18 40 00 00 00 00 00 00 00    h?.x??.?@.......

10: 40 00 00 00 00 00 00 00 00 01 00 00 23 10 99 00    @........?..#??.

20: 00 09 42 20 08 00 83 84 00 00 00 00 00 00 00 00    .?B ?.??........

30: 00 00 90 25 01 00 00 8c 00 00 00 05 20 e0 23 00    ..?%?..?...? ?#.

40: 43 03 03 00 60 88 00 00 0f 80 00 08 00 00 63 00    C??.`?..??.?..c.

50: 03 10 00 01 80 00 00 00 00 7f 20 20 00 00 00 00    ??.??....?  ....

60: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00    ....?...........

70: 00 00 00 07 07 08 00 00 00 00 00 00 02 00 00 00    ...???......?...

80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

a0: 00 00 8c 00 00 00 00 00 00 00 00 00 00 00 00 00    ..?.............

b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

c0: 00 00 00 00 00 00 00 00 c0 00 00 00 00 00 00 00    ........?.......

d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

f0: 5f 55 42 39 34 38 00 00 00 00 00 00 00 00 00 00    _UB948..........

  • Hi team,

    any comments? thanks.

  • Hi Betty,

    Thank you for reaching out to us. I need more time to review the register dump. I will get back with you by 12/14.

    Aaron

  • Hi Betty,

    I reviewed your dump registers set. I don't see any issue. It looks like that you are having issue with your SI when you are trying to run at the higher datarate. Can you try to run the Margin Analysis Tool for 921 and 948? Thanks.

    Aaron

  • Hi Aaron:

    What do you mean the SI ?i don't know it.

    No size specified (using byte-data access)

         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef

    00: 18 00 00 fa 80 00 68 40 40 00 00 00 05 00 00 00    ?..??.h@@...?...

    10: 00 00 00 10 00 00 fe 5e a1 a5 00 00 00 00 00 00    ...?..?^??......

    20: 00 00 25 00 00 00 00 00 00 24 00 a0 00 00 00 00    ..%......$.?....

    30: 03 10 00 00 00 00 08 34 00 0a 20 21 00 00 f0 00    ??....?4.? !..?.

    40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    50: 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ...............

    60: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00    ....?...........

    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    c0: 00 00 80 00 78 00 00 60 40 00 00 00 00 00 00 00    ..?.x..`@.......

    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    f0: 5f 55 42 39 32 31 00 00 00 00 00 00 00 00 00 00    _UB921..........

                                                                                                             

    No size specified (using byte-data access)

         0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef

    00: 18 00 00 fa 80 00 68 40 40 00 00 00 05 00 00 00    ?..??.h@@...?...

    10: 00 00 00 10 00 00 fe 5e a1 a5 00 00 00 00 00 00    ...?..?^??......

    20: 00 00 25 00 00 00 00 00 00 24 00 a0 00 00 00 00    ..%......$.?....

    30: 03 10 00 00 00 00 08 34 00 0a 20 21 00 00 f0 00    ??....?4.? !..?.

    40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    50: 20 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00     ...............

    60: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 00 00    ....?...........

    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    c0: 00 00 80 00 48 08 00 00 40 00 00 00 00 00 00 00    ..?.H?..@.......

    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................

    f0: 5f 55 42 39 32 31 00 00 00 00 00 00 00 00 00 00    _UB921..........

    The above is ti921 flash screen before and after comparison, C4 register value changes, what is the role of C4 register?

  • Hi Aaron,

    one more question, customer need some time use ALP to analysis. they want to know if there have issue with SI, how to fix? it related with hardware or software?

    for Margin analysis, what information the margin analysis reslut can provide?

    And, I also want to check with you is that does this issue may related to AEQ ?

    thanks.

  • Hi Betty,

    Sure. If you can't run at the higher datarate, there are many issues to poor SI performance for example, it could be using the wrong connector, layout, and cable harness.

    The Margin Analysis will help us identifying how big the eye opening is whether it is meet the specs.

    I don't think it is, but let wait until you have the data ready.

    Aaron

  • Do the above results meet the requirements?

  • Do the above results meet the requirements?

  • Hi Chuan Le,

    Let me know this and I will get back with you sometimes 12/18.

    Aaron

  • Hi Chuan Le,

    The results doesn't look correct. You might have the wrong setting. You should have it done in full scan: strobe 0-9 and EQ 0-14. BTW, what is the cable length of your setup?

    Below is the snapshot that I took for 949 to 948 EVM.

    Hope this helps. Let me know if you have any questions.

    Aaron

  • i cable length is 2m。 

    I don't understand what you mean in the picture above? What are EQ and AP?
    What is the function of the 0x53 register of ti948?
    i set register  0x53 value is 0x1d , the splash disappear,why?

  • Hi Aaron,

    based on customer reply, I add more information.

    1. use ALP tools, customer change the Strobe Position Begin from 2 to 0, the display will be normal.

    2. compare the reg value, he found the 0x53 is changed, when Strobe Position Begin is 2(display splash), 0x53=0x01, when Strobe Position Begin is 0(display normal), 0x53=0x1D.

    3. He use I2C instead of ALP tools to write reg 0x53 to 0x1D, the display will be normal and not splash.

    thanks.

  • Hi Betty, Chuang Le,

    The register 0x53 is for internal use. Please do not change the setting of the 0x53. Unfortunately, I can't disclosed the information what the register is for.

    Aaron

  • Hi Aaron,

    customer compared normal and splash reg value, only the 0x53 is difference. if 0x53 can't be change, what's the next step to debug? and, based on customer margin analysis, could you give comments? does it recommended?

    thanks.

  • Hi Aaron,

    more information:

    1. they test that use 921 pattern mode in the same display, it still splash. use 948 pattern mode, display normal. before, they use 2m cable, now use 1m cable, the issue is remind. any suggestions ? also for reg 0x53, we check it on other A/N, said it is used as clock delay

     2. for strobe positions, you can see below A/N, why 948 don't have this reg? 

    if some information is NDA, you can sent me via email, I can loop customer together to discuss it. thanks.

  • it sounds your guys paste two tickets here on the same topics.

    please note:

    1. the map result in your system board is NOT consistent, this is NOT good board level design from the MAP result.

    2. As highlighted several times the strobe of 948 can't be changed in your system board. for the MAP result, you can check the margin. talked in item1, the margin result is NOT good in your system, so the solution is on how to improve your highs speed serial link design issue:

    a. transmitter side ds90ub921: power supply noise? on-board layout?

    b. connector and cable quality? how about the impedance and s11/s21 parameters? how about the hardness perforamnce?

    c. 948 side as receiver: power supply noise? on- board layout, impedance?

    3. you need improve this system design to improve the link margin, and make the MAP result better (example from aaron)

    regards,

    Steven

  • Hi Steven,

    I sent you customer sch, layout and power supply noise test result via email, please help to review and give suggestions. thanks.

  • we need few days for it. 

    it would be better if you can study TI's evm design as reference.

    regarsd,

    Steven