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Original question:

DS90UB948-Q1EVM: ALP Information Tab does not update, registers do not have values

DS90UB948-Q1: ALP pattern generator setting

James Zhan
Expert 4365 points
Part Number: DS90UB948-Q1
Other Parts Discussed in Thread: ALP

Hi team,

A quick question from customer about the ALP setting of UB948, screenshot as below:

Timing source:

1. External    (Means external timing and external clk?)

2. Internal    (Both clk and timing are internal?)

3. Internal w/Ext.clock (Internal timing with external clk?)

3. Internal w/Ext. Pixel Clock (what's the difference with No.3?)

Thanks.

  • 0
    TI__Genius 12866 points

    Hi James,

    Your understanding on 1-3 are correct. 

    1. External    (Means external timing and external clk)

    2. Internal    (Both clk and timing are internal)

    3. Internal w/Ext.clock (Internal timing with external clk)

    4. Internal w/Ext. Pixel Clock. This will select pclk based on BISTC strap option. If BISTC is strapped to 33mhz, the patgen will run with 33mhz or alternatively run with pixel clock which will be the sane as option 3.

    Best Regards,

    Charley Cai