Other Parts Discussed in Thread: TIDA-00204
Dear team,
My customer is evaluating the DP83867IR on their board. When they checked the trace lengths of RGMII signals between the DP83867IR and MAC, it was around 151 mm.
The datasheet of DP83867IR, in page 122, describes as follows,
9.2.2.1.1 RGMII Layout Guidelines
- Keep trace lengths as short as possible; less than 2 inches (50.8 mm) is recommended with less than 6 inches (152.4 mm) as maximum length.
And the TIDA-00204, in page 69, describes as follows,
6.4.2 Layout RGMII Signals
- The RGMII interface is a 125-MHz signal, which gives a full clock cycle of 8 ns.
- The typical propagation delay in a FR4 stripline is 7.087 ns/mm ps/mm, which means that the length of the RGMII interface introduces a delay that should be kept as small as possible. For the RGMII signal below 0.5 ns, this should be a delay that can be ignored. So the signal can be around 63.5-mm long, maximum.
About the description of "For the RGMII signal below 0.5 ns, this should be a delay that can be ignored.", what is the basis for this ignorable 0.5 ns delay?
Is it a percentage of the RGMII signal period of 8 ns?
Is it based on any register setting of DP83867IR?
I look forward to your reply.
Thank you.
Best Regards,
Koshi Ninomiya
