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SN65LVDT34: Confirmation

Part Number: SN65LVDT34
Other Parts Discussed in Thread: SN65LVDS34

Hi Team,

Good day.

Customer want to know how to get the 444mW  power rating of the integrated resistor. They want to know the exact power for their desing.  As mention in this link (https://e2e.ti.com/support/interface/f/interface-forum/971283/sn65lvdt34-power-rating-of-the-integrated-resistor)

Regards,

Maynard

  • Hi Maynard,

    It's from the Differential input current spec. 2.22mA max current at 200mV swing means the resistor is rated for at least 444mW.

    Regards,

    I.K. 

  • I'm missing something. P=IV; 2.22mA * 200mV =444uW

  • Ah, yes sorry messed up the units there. Correct, it is 444uW using information in the datasheet.

    Regards,

    I.k. 

  • Thanks, so now looking at the power dissipation provided in the datasheet.

    The package for the SN65LVDT34D appears to only be available in the 8 pin SOIC and with 2 receivers per package (no enable function internal termination packages).  The dissipation rating table indicates at 25C it's 725mW.  Where's the discrepancy between the power dissipated in the integrated resistor and what's listed in the table? That would indicate a lot of inefficiency if the power rating for the integrated resistor is in the uW.

  • The power rating listed in the table is the maximum power that the device can dissipate, and is related to the maximum junction temperature and thermal resistance. This drives additional losses like convection and radiation energy from the package. You can reference these application note for more details:

    https://www.ti.com/lit/an/spra953c/spra953c.pdf

    https://www.ti.com/lit/an/slva462/slva462.pdf

    Regards,

    I.K. 

  • not sure if the last request for information went through so i'll repeat.

    1) if the recommended magnitude of the differential input voltage for LVDT is 0.8V and the absolute maximum differential voltage is 1V, why is 200mV used to determine the max power rating for the integrated resistor?

    2) How is the margin determined to the absolute max power rating of the integrated resistor? For instance, does TI uses a derating factor such that the max power rating is 2x to 10x > max spec'd.

    3) For the receiver without the integrated resistor (SN65LVDS34) the magnitude differential voltage input is 3V max (versus the 1V max for the device with the integrated resistor). What determines the max diff voltage swing of 3V?

    Thanks

  • Hi Debbie,

    Sorry for the delay, I've been checking with design to see if they have any input - will keep you updated if there's any other information that can be provided.

    Regards,

    I.K.

  • Hi Debbie,

    Unfortunately design does not have any further information on these specific questions outside of what's available in the datasheet. Pertaining to the original question though, the main point is that TTL level signals applied to the input violate the absolute max specs listed in the datasheet, and TI will not diverge from these specs in any way that implies that it is okay to operate the device outside of these specs without risk of damage (this applies to all TI parts). 

    Regards,

    I.K.