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DS90UB949-Q1EVM: DS90UB949-EVM , DS90UB948-EVM 1024 * 720 Display output is not proper

Part Number: DS90UB949-Q1EVM
Other Parts Discussed in Thread: ALP

Hello Team,

We are using the following connection setup.

Windows PC->HDMI->DS90UB949EVM->DS90UB948EVM->1024*720 TFT PANEL.

Using ALP Tool We configured 949 and 948 EVM.  We are using Dual FPD Link. In 948 we are using MODESEL_0   as 6 (Single OLDI output)  and MODSEL_1 as 2 (20 MbpsSTP) .

We were able to get the Display , but In the center of the display the output image is getting cut off.  The Display Resolution of  panel is 1024 * 720 where as In Windows PC the resolution configured as 1280 * 720. 

Please find the attached image for the reference.

Please help to suggest on this.

Thanks,

Sundar

  • Hello Sundar,

    If the HDMI source is providing 1280x720 and the display panel expects 1024x720 then this is expected behavior. You need to configure the source to provide the correct resolution for the panel. What I would recommend is to configure the 949 EDID SRAM (see section 7.3.4 of the 949 datasheet) to match the EDID of the panel so that the HDMI source PC knows to provide the correct display resolution. 

    Best Regards,

    Casey 

  • Hello Casey, Thanks for the reply. Could you please suggest us how to modify the EDID in SRAM for 800 x 480 display? Currently we were able to set 640x480 and 1280 x720 in EDID SRAM. But we would like to configure 800 x480 .Please suggest how to do that.

    Is 949 supports 800 x480 display?

    Thanks,

    Sundar

  • Hello Sundar,

    The EDID SRAM can be programmed using registers 0x48-0x4B. You select the EDID SRAM space in APB_CTL:

    Then use reg 0x49 to select the EDID address 0x00-0xFF and write each byte value in 0x4B for all 256 bytes. Yes, 949 can support 800x480 or really any arbitrary resolution so long as it fits the PCLK range of the device. You can use an EDID generator program such as AW EDID editor to create an EDID if you do not already have one

    Best Regards,

    Casey 

  • Hello Casey,

    Thanks for your reply.

    We were able to generate EDID for our TFT panel and its fine. But we are observing colour changes in the display.

    We are using TFT panel which supports LVDS JEIDA 6/8 bit supported RGB format.

    Does 949 or 948 supports JEIDA format?

  • Hello Sundar,

    Please try changing the MAPSEL setting on the 948 device:

    Best Regards,

    Casey 

  • Hello Casey,

    Thanks for your reply. We have selected MODESEL0 as 6 and MODESEL1 as 2. But we are observing in the output there is loss of grayscale and RGB data.

    Do you think it is a hardware connection issue or software configuration issue? Please help to suggest/

    Thanks,

    Sundar

  • Hello Sundar,

    Did you try both MAPSEL = H and MAPSEL = L to see if there is any difference? This can be configured through the 948 register overrides so you do not need to change the MODE_SEL straps. Usually if the display is up and the timing is stable but the colors are incorrect it is either a problem with the OLDI mapping (which can be adjusted using MAPSEL) or the source is providing the incorrect bit depth (18 bit vs 24 bit). Can you send a picture of what the display looks like now that the EDID has been fixed and the source is providing the correct resolution? Also just to confirm - this is a single OLDI display?

    Best Regards,

    Casey