• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 35 subscribers
  • Views 369 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PCA9548A: Pull-up calculation

Stephen Turner
Genius 3235 points
Part Number: PCA9548A
Other Parts Discussed in Thread: PCA9534

Hi,

We have a design that uses two levels of PCA9548A mux. i.e

Processor--PU--PCA9548A--PU--PCA9548A--PU--I2C_peripheral
                       \-PU--PCA9548A--PU--I2C_peripheral

Where PU is the Pull-Up on SDA/SCL.  Everything is powered and pulled up to 3.3V and we are running in Fast-mode (400kHz).

Its not quite clear to me from reading the datasheet, what each individual pull-up resistor should be.  Normally if I was just connecting the Processor directly to an I2C peripheral, I'd use a 2.2K pull-up.  Using the two level PCA9548A, should each pull-up also be 2.2K?.  OR is each pull-up essentially in parallel with the other, so to get a 2.2K total, each pull-up should be say 6.6K?.

Putting it another way, are the "switches" in the PCA9548A true SPDT switches or do they have some sort of active "drive" that isolates each side of the mux.

thanks

  • 0
    Guru 243220 points

    The PCA9534 is not a mux.

    A mux creates a direct electrical connection between the two sides. When the switch is closed, all pull-up resistors act in parallel.

  • 0 in reply to Clemens Ladisch
    Genius 3235 points

    My apologies!.  I was looking at the wrong part on my schematic.  I'm talking about the PCA9548A mux.  Thanks

  • 0 in reply to Stephen Turner
    TI__Mastermind 47895 points

    Hi Stephen,

    Clemens response is correct here and applies for PCA9548A as well. When the switch is active, all pull-up resistors on the active lines will act in parallel and should be valued accordingly. With your described topology, it should be simple to adjust the resistor values for this. Keep in mind that other topologies, such as one that would need to communicate with no channels active (between two devices on the original SDA/SCL), the resistors would need to be selected to ensure a suitable environment for the smaller bus. 

    Let us know if you have any more questions. 

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Genius 3235 points

    The I2C host we are using is a RPi CM4 module.  It has built in 1.8K I2C pullups.  I'm thinking a 10K pull-up on each of the mux sub-busses should do the trick.  1.8K || 10K || 10K = 1.3K.

    thanks

    Steve

  • +1 in reply to Stephen Turner
    TI__Mastermind 49070 points

    They are parallel in the sense when an external driver is pulling the line low, during the HI-Z phase where an external driver stops driving low the I2C MUX/Switch will 'stop' being parallel when the voltage of the bus goes above Vgate-Vth of the switch/MUX. If you zoom in closely to a waveform of the I2C bus, you can usually see some kind of step in the low nanosecond range when this occurs. Usually you can pick the pull up values based on the segmented buses. (Secondary channel max pull up value based on the I2C Pull up calculation: https://www.ti.com/lit/pdf/slva689 where you would need to estimate the bus cap and choose t_rise based on 400kHz operation or 100kHz operation)

    -Bobby