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DP83640: dp83640 for IEEE1588 clock function

Part Number: DP83640

Hello sir,

One of my customer wants to using our DP38640 for IEEE 1588 Clock function, paired with RK3308 MAC interface to realize AES67 transmission.
Here are three questions from the customer:

1. The interconnection layer transmission is only associated with the 1588 protocol. I want to know if the clock adjustment of the DP83640 is automatic and does not need to be configured?
2. Can the PHY synchronized clock be sent to the CPU as an audio clock through PHY frequency division or PHY GPIO?
3. Please introduce the mechanism of PHY physical clock synchronization, which requires the CPU to participate in the operation.

If more material related to this application, please feel free to send for me. Besides, the customer is requesting for a WEBEX meeting with product line to talk about their application for more details. If it's ok, I can help to set up an WEBEX meeting. For more project backgrounds, I can send you by email.


Best regards,
wenting Wu
  • Hi Wenting,

    1. The clock adjustments are typically calculated by an algorithm on a microcontroller who then writes to the registers of the DP83640 to adjust the clock.
    2. What frequency do you need for the audio clock? There is a feature where the output clock frequency can be divided by an integer. Refer to register "PTP Clock Output Control Register (PTP_COC)" on page 109 for more details.
    3. Below is a link to a small article on how IEEE 1588 is implemented. At the bottom, the article also contains links to applications notes on IEEE 1588 as well. These app notes can also be found on the DP83640 product page.

    https://e2e.ti.com/blogs_/b/analogwire/posts/how-to-implement-ieee-1588-time-stamping-in-an-ethernet-transceiver

    It would be great if you can set up a WEBEX meeting with the customer to learn more about their application. Feel free to email me the meeting information.

    Regards,

    Adrian Kam