Hello sir,
One of my customer wants to using our DP38640 for IEEE 1588 Clock function, paired with RK3308 MAC interface to realize AES67 transmission.
Here are three questions from the customer:
1. The interconnection layer transmission is only associated with the 1588 protocol. I want to know if the clock adjustment of the DP83640 is automatic and does not need to be configured?
2. Can the PHY synchronized clock be sent to the CPU as an audio clock through PHY frequency division or PHY GPIO?
3. Please introduce the mechanism of PHY physical clock synchronization, which requires the CPU to participate in the operation.
If more material related to this application, please feel free to send for me. Besides, the customer is requesting for a WEBEX meeting with product line to talk about their application for more details. If it's ok, I can help to set up an WEBEX meeting. For more project backgrounds, I can send you by email.
Best regards,
wenting Wu