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TCAN4550EVM: read Problems TCAN4550EVM

Part Number: TCAN4550EVM
Other Parts Discussed in Thread: TCAN4550


I wrote my own little code to send a SPI message from my Infineon TLE9869QXA0  to the TCAN4550.

I want to read a simple register and send the following array: {0x41, 0x00, 0x00, 0x02}. But as output I always get only "0x88, 0x00, 0x00, 0x00".

I looked in the forum and some have this error when CS goes high during transmission. But this is not the case with me, I have attached two oscilloscope pictures that show my problem. Can you help me?

Thank you very much in advance.


Timo Blessing

  • Hello,

    The problem is that your SPI Read transaction is incomplete and you are terminating it before it has a chance to return a value.  You need to keep the the clock running for as many words of data you are requesting. A single register read requires 8 bytes. 

    The first 4 are as you have shown with exception of the Length byte which would be 0x1 for a single register read.

    Then the next 4 bytes are simply to provide 32 clock cycles for the data to be returned.  The TCAN4550 ignores the data you are writing, but it requires the SCLK to be active so that it can return the data to the MCU.

    As an example, to read register 0x0000, you would need to do the following:

    1.) toggle the CS pin low

    2.) Simultaneously Output 0x41, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00 on the MOSI and monitor the MISO. Capture all 8 bytes.

    3.) The first byte of data on the MISO is the Global Status Flag and contains the most important interrupt flags including SPI Errors that may have occurred in the previous transaction.  This is register 0x0820[7:0].  You are capturing this as 0x88 indicating the Global Error and SPI Error flags have been set due to the SPI errors.  You can discard the next 2 bytes and the register data you want to read are the last 4 bytes.

    4.) Once all 8 bytes are done, toggle the CS pin High again to complete the transaction.

    In your screenshots, you are requesting to read 2 registers worth of data and then terminating the transaction before the first register read has even started.  The TCAN4550 is generating a SPI Error because you have told it to return 64 bits worth of data, but are not providing the clock cycles to do so.

    I want to also just clarify the Length Field.  This is the number of "words" of data you want to read where each word is equal to 4 bytes or 32 bits of data.  Each register is 1 word.  When you are writing to the MRAM space, you must read/write to 1 word at a time.  The TCAN4550 actually counts the number of clock cycles between the CS pin toggling low and high again to make sure there is an exact multiple of 32 bits as a form of error correcting.  If there are too few, or too many clock cycles, then it will flag a SPI error.  Also, it verifies that the same number of words of data requested or transmitted mach the value in the Length field.  If you request 2 words of data, it will expect 64 clock cycles during the data portion, or it will generate a FIFO overflow or underflow error which is a form of SPI error.

    Reading/writing multiple words of MRAM data or registers at a time can reduce the overall amount of time it takes to configure the device by reducing the number of times you are sending the initial 4 bytes with the R/W op code, address, and length fields.

    As a final example, if you wanted to read registers 0x0000 and 0x0004 in a single transaction, you would output 0x41, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 on the MOSI line while the CS pin is Low and the two register values will be the last 8 bytes of data returned on the MISO line.