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DP83822I: Query related RESET_N pin of Ethernet PHY DP83822I

Part Number: DP83822I
Other Parts Discussed in Thread: TIDA-00928


I am using Ethernet PHY DP83822I in my design. I have Query related RESET_N (Pin number 18) pin of Ethernet PHY DP83822I.

1. Whether RESET_N (Pin number 18) is a Schmitt Trigger input type ?

2. If RESET_N pin is Schmitt Trigger input type then, please provide input voltage Hysteresis details.

3. If RESET_N pin is not Schmitt trigger type input then, what is the input type  ?

Please convey. 



  • Hello Rohidas,

    Thank you for the query.

    The RESET_N  is a GPIO type and is a dedicated input.

    Please refer to 7.5 Electrical Characteristics for the levels.



  • Hello Sreenivasa,

    Thanks for your reply!

    It is mentioned in Datasheet of Ethernet PHY DP83822I that, minimum RESET pulse width = 10uSec.

    (Please refer Section 7.7 Timing Requirements, Reset Timing, page 11 from datasheet for details)

    It means RESET should be held "Low"  at least for 10uSec. 

    My question is ->

    1. If any Noise Spike less than 10uSec arrives, whether PHY will get Reseted ?

    2. Whether this timing 10uSec is provided to protect PHY from erroneous reset in EMI/EMC noise condition ?

    3. Whether it is recommend to connect 0.1uF capacitor at RESET_N pin of PHY ?

    4. Is it Ok, if 0.1uF capacitor is not connected ?

  • Hello Rohidas,

    The timing is to recognize the strap pins during power up.

    If you take care of the board design guidelines specified in the datasheet, the noise performance should not be a concern. If you still have some concern, please provide a provision for the cap and based on the testing you could either populate or de populate.

    We have tested the device for all the IEC requirements for EMI/EMC. You could refer to TIDA-00928.