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Interface

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Interface forum

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Texas Instruments (TI) Interface support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search interface IC content or ask technical support questions on everything from ESD protection to interfacing with USB, Ethernet, and HDMI. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] DP83TD510E: Can we use a transformer instead of Capacitor for AC coupling on the MDI side for DP83TD510?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TD510E Yes, transformer can be used for filtering out the DC signal when the data is passing through the MDI side. In fact, we use transformer to filter out the AC signal in the Power over Data Line (PoDL) application. Here are the…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] What is the difference between RMII slave signaling and RMII master signaling?

    Hillman Lin
    Hillman Lin
    RMII slave signaling is connecting 50MHz Crystal to two XI pin of the PHY and/or MAC RMII master signaling is connection 25MHz Crystal to one Master and provide a 50MHz reference lock through REF_CLK pin to the XI pin of the slave side. Slave side does…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC812R-Q1: How can I connect PHYs back to back over RMII?

    Hillman Lin
    Hillman Lin
    Part Number: DP83TC812R-Q1 There are two type of mode that RMII can support: RMII normal mode and RMII Repeater mode: RMII normal mode is also known as MAC to PHY RMII connection. This mode is set as default mode in DP83TC812 so it did not need…
    • over 3 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83TC811S-Q1: Why is Slave/Managed mode PHY linking up with Master/Autonomous PHY link partner?

    Gerome Cacho
    Gerome Cacho
    Part Number: DP83TC811S-Q1 Other Parts Discussed in Thread: DP83TC811R-Q1 When using DP83TC811S-Q1 (or DP83TC811R-Q1), and setting the PHY into managed mode as a slave device via bootstrapping settings, if this device is connected to a master link partner…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UH949-Q1: Disable HDCP to work with UB Deserializer

    Alex Reid1
    Alex Reid1
    Part Number: DS90UH949-Q1 Hello, My customer would like to use DS90 UH949 -Q1 devices in place of the DS90 UB949A -Q1 to keep production running. In reviewing the details they have the following questions. Can the HDCP function be disabled? If…
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] Why am I getting "clause-45 not supported" and "error-95" errors with PHY drivers?

    Vikram Sharma
    Vikram Sharma
    Possible reason can be : - "phy_read_mmd" and "phy_write_mmd" are not supported in your kernel version (if version is old). Possible solution to be evaluated : - Change "phy_write_mmd" to "phy_write_mmd_indirect" function and do the corresponding…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DS90UB960-Q1: BIST Duration

    ReedKacz
    ReedKacz
    Part Number: DS90UB960-Q1 Hi Team, What is the recommended duration to run the BIST? Thanks Reed
    • Answered
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select correct RGMII delay mode for PHY and MAC?

    Vikram Sharma
    Vikram Sharma
    RGMII standard asks for the introduction of delay in the clock (RX_CLK/TX_CLK) with respect to the respective data (RX_D*/RX_CTRL or TX_D*/TX_CTRL). This delay can be introduced at the source of the clock or at the receiver side. Following table should…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] How to select the crystal's ppm specification for an Ethernet system?

    Vikram Sharma
    Vikram Sharma
    Other Parts Discussed in Thread: DP83TC811 Ethernet data travels effectively from one MAC to another MAC with two Ethernet PHYs in between. Each of these 4 ICs can have their own reference clocks and crystal attached to each is the usual source of this…
    • over 4 years ago
    • Interface
    • Interface forum
  • [FAQ] DP83867IR: DP83867 digital loopback fail, how to set MII and PCS loopback

    Richard Yang1
    Richard Yang1
    Part Number: DP83867IR Hi Team: Customer side need our help to find the root cause of DP83867 Communication failure issue from one failed board . could you please help to take a look at the attached , customer need to know How to enable MII and PCS…
    • over 4 years ago
    • Interface
    • Interface forum
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    TPS25854Q1EVM-164: altium project document of TPS25854Q1EVM-164 0 Locked

    428 views
    4 replies
    Latest over 4 years ago
    by Kuno Wu
  • Answered

    TUSB216I: About direction of D1P, D1M and D2P, D2M 0 Locked

    431 views
    2 replies
    Latest over 4 years ago
    by Hide
  • Answered

    TS3USB31E: Parameter tj(Total jitter) #2 0 Locked

    404 views
    2 replies
    Latest over 4 years ago
    by user6004480
  • Answered

    DS90UB941AS-Q1: Please check splitter mode configuration 0 Locked

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    51 replies
    Latest over 4 years ago
    by Logan Cummins
  • Not Answered

    DS90UB960-Q1: Question for the DS90UB960-Q1 CSI-2 Forwarding Selection 0 Locked

    1017 views
    10 replies
    Latest over 4 years ago
    by Shruti More
  • Not Answered

    TUSB2077A: Hub not detect. 0 Locked

    990 views
    9 replies
    Latest over 4 years ago
    by JMMN
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    by Alon Kopelman
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    511 views
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    by Parker Dodson
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    533 views
    1 reply
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    by Alon Kopelman
  • Suggested Answer

    TCAN1057A-Q1: CAN waveform have a strange... level shift? 0 Locked

    600 views
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    by Eric Schott1
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    805 views
    13 replies
    Latest over 4 years ago
    by Nasser Mohammadi
  • Not Answered

    DS90UB962-Q1: Some data format and FPDLINK rate questions on 962 and 964 0 Locked

    425 views
    5 replies
    Latest over 4 years ago
    by Nicholas Darash
  • Not Answered

    TCA9546A: Fall time definition in different I2C version 0 Locked

    444 views
    1 reply
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    by Chris Ayoub
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    by Tyler Townsend
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    by Chuck Branch
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    12 replies
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    by Chris Ayoub
  • Suggested Answer

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    464 views
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    Latest over 4 years ago
    by Christodulos Tsongas
  • Suggested Answer

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    346 views
    1 reply
    Latest over 4 years ago
    by David (ASIC) Liu
  • Answered

    DS90UB960-Q1: Indirect address register settings 0 Locked

    269 views
    3 replies
    Latest over 4 years ago
    by Torsten Dr. Kilias
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