https://e2e.ti.com/support/interface-group/interface/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1655118/max3223-transmitter-section-failure-of-max3223ipwSat, 13 Jun 2026 14:57:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5180ae03-b681-44ea-8596-92e8d0cd77ceAnurag BajpaiPart Number: MAX3223 Hi in one application for MAX3223IPW , the force on is connected with invalid bar pin with zero ohm resistor. By mistake the force on is also connected with ground using zero ohm resistor. Initially the ic was working fine, now the tranmit section on RS 232 is sending garbage while the recive section of rs232 of ic is working fine. Can you tell due the invalid bar pin is connected to ground has done the damage to the IC? Thank you.Industrial AutomationMAX3223https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1655115/ds90ub983-q1-compatibility-inquiry-ds90ub983-q1-with-ds90ub948-q1-for-dp-to-dual-lvds-display-applicationSat, 13 Jun 2026 12:37:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:af69c1bc-7ed1-4737-b5c7-9590094c3510Madhan KumarPart Number: DS90UB983-Q1 Other Parts Discussed in Thread: DS90UB948-Q1 I am evaluating a display architecture and would like to confirm the compatibility of the selected devices. System Architecture: Board 1: Mini Display Port (mDP) input from host system DS90UB983-Q1 serializer Coaxial cable output Board 2: Coaxial cable input DS90UB948-Q1 deserializer Dual LVDS output to display panel(s) The intended signal path is: mDP Source → DS90UB983-Q1 → Coaxial Cable → DS90UB948-Q1 → Dual LVDS Display I would like to know: Is DS90UB983-Q1 compatible with DS90UB948-Q1 in this configuration? Can the DS90UB983-Q1 establish a valid link with the DS90UB948-Q1 over a coaxial cable? If they are not directly compatible, could you please recommend the appropriate serializer/deserializer pair for converting a Mini Display Port source to Dual LVDS displays over a coaxial cable? Are there any reference designs, application notes, or design considerations relevant to this implementation? Display requirements: Interface: Mini Display Port input Transmission medium: Coaxial cable Display interface: Dual LVDS Resolution: 1920 * 1080 Refresh rate: 60Hz Thank you for your support. I look forward to your guidance.DS90UB983-Q1DS90UB948-Q1https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1655103/xio2001evm-pci-card-detectionSat, 13 Jun 2026 07:16:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:bf835f4d-8d55-4d59-87ad-c05fc99488b6vara prasadPart Number: XIO2001EVM I inserted a PCI card into the EVM slot. When used together, the EVM is detected but the PCI card is not — however, both cards work fine individually in their respective slots on both Linux and Windows.XIO2001EVMhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1649197/dp83869hm-request-for-schematic-pre-check-and-ethernet-phy-design-validation-am2634-dp83869/6381721Sat, 13 Jun 2026 04:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c9383f8c-0f5b-43af-88ea-58d5d9c2be73phanendra beellaDear Gregory, Thank for your response . we are eagerly waiting for your confirmationhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654783/dp83tc815-q1-dp83tc815-q1-can-not-be-detected-on-mdio-bus/6381706Sat, 13 Jun 2026 02:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d133c6df-a154-4090-8c2d-3fca32fb3d17gavin zhangHi, Drew Yes, you are correct, INH is low, this chip is in sleep state. on my board ,there is no fanout of wake pin, so can I change the DP83TC815 to DP83TC814, they are pin to pin compatible and DP83TC814 do not support TC10. I think I can change bom only, is it correct?https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654783/dp83tc815-q1-dp83tc815-q1-can-not-be-detected-on-mdio-bus/6381702Sat, 13 Jun 2026 01:50:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4c1519e1-8019-47c2-9dc4-aa2db1f85505Drew Miller1Hi Gavin, I apologize, I mixed up RX_CTRL and RX_CLK. You are correct regarding RX_CTRL. With RX_CLK floating, TC10 is enabled. PHY may be asleep. You can check INH pin to confirm. INH is high-Z when PHY is asleep, so it would be pulled down by 3.3kOhm in your design. To wake up PHY, pull WAKE pin to VSLEEP. Thanks, Drewhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654783/dp83tc815-q1-dp83tc815-q1-can-not-be-detected-on-mdio-bus/6381700Sat, 13 Jun 2026 01:45:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7bd1bdc2-f3eb-49b6-9907-cbce24688192gavin zhangHi, Drew 1. clk_out waveform: 2. For RX_CTRL pin, it is defined as 3-level strap pin on datasheet: so is it correct? Thanks Gavinhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654826/tusb2e221-sch-review/6381698Sat, 13 Jun 2026 01:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:387c43d1-c194-400b-abba-0a01d2b71c34Charles (KAT) ZhangThank you Ryan!https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1653274/am6442-ospi-flash-through-uart-uniflash/6381696Sat, 13 Jun 2026 01:03:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:895d1441-afa3-4cfa-a887-14c9ab105a12Bin LiuHi Ganesh, I will review this later next week and get back to you.https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654980/thvd2452v-ep-de-and-re-tied-together/6381689Sat, 13 Jun 2026 00:22:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f7441b32-49c2-4ce9-ae70-e2521efc5402Ethan SempsrottHi Filipe, Yes, they can short the bus pins to achieve half-duplex. They can also short /RE and DE together so only one GPIO is needed to control the mode. This is a very common implementation. When they driver the line high, the driver will be enabled and the receiver will be disabled, and vice versa. Best, Ethanhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1653938/thvd1424-question-about-iec-esd-eft-rating-acceptance-criteria-for-thvd1424/6381688Sat, 13 Jun 2026 00:19:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0584b595-09ee-4db8-b8da-603b7b1e523fEthan SempsrottNo, the resistor does not need an ESD rating. The transceiver will still achieve its ESD rating regardless.https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654794/tcan1145-q1-problem-with-can-transceiver-tcan1145-q1/6381686Sat, 13 Jun 2026 00:16:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:726cb932-6ebb-4ab3-9867-57f7f78826beEthan SempsrottHi Jan, Thanks for reaching out on E2E. So you are saying that when CANL is shorted to GND, TCAN1145 is permanently damaged? Did you check to see if CANH is shorted to GND well? Yes, shorting any supply at or above 12V to CANH/L can be a problem with a CMC as that app note shows. However, shorting CANL to GND with a CMC should not be a problem at all. [quote userid=&quot;703723&quot; url=&quot;~/support/interface-group/interface/f/interface-forum/1654794/tcan1145-q1-problem-with-can-transceiver-tcan1145-q1&quot;]Both simulations and bench tests indicate that the CM choke causes negative transients at the transceiver CANL port at the trailing edge of every CAN bit sent.[/quote] During those tests, was CANL shorted to GND? Or was CANH and CANL in normal operating conditions? Dose every trailing edge show this? Q1. Yes, I would still recommend external ESD diodes (especially in between the CMC and the transceiver if you suspect that there is a potential issue). The main reason is the transient created by the CMC may not match the IEC 61000-4-2 or other ESD standards. The real-world ESD strikes can also be much higher than 8kV, and the internal diodes don&#39;t protect against any other forms of longer ESD strikes (like IEC 61000-4-5 surge). Our recommended diode is the ESD2CAN24, which supports up to 30kV IEC 61000-4-2 and ~5A of surge. This diode clamps at ~24V which will also help prevent voltage spikes from damaging the CAN transceiver pins (i.e. going above 58V). If those internal diodes clamp any higher than 60V (like in the case of a large surge event), they could potentially cause that EOS. Q2. Yes, this is tested. However, this is not tested with a CMC. The issue of clamping does not apply below 58V. This is because the transceiver can sustain 58V indefinitely. This would not be a transient. Hence, why the internal diodes clamp just above 58V. Q3. Yes, the clamping is always present since it is part of the TCAN1145 die. It is not a separate piece of silicon. Q4. Your calculations are accurate, but they do not really apply as the issue you are experiencing likely does not line up with the exact ESD standard waveform. So the voltage, amperage, and time will be different. Best, Ethanhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654462/dp83tg721s-q1-required-ferrite-beads/6381643Fri, 12 Jun 2026 22:31:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a3211491-6dbd-40a1-b775-60a16a41f555Drew Miller1Hi Katharina, 1 A) The Impedance at 100 MHz, DC resistance, and rated current are all parameters to consider when selecting a ferrite bead. B) Typically, ferrite bead impedance is specified at 100 MHz. 2 There is a risk of negatively impacting EMC performance if separate ferrite beads are not used. Thanks, Drewhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654783/dp83tc815-q1-dp83tc815-q1-can-not-be-detected-on-mdio-bus/6381635Fri, 12 Jun 2026 22:21:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:14a4974b-32cb-4232-8c55-56ecd99b3635Drew Miller1Hi Gavin, Can you check clk_out signal? Also, I noticed you have 4.53kOhm pullup resistor on RX_CTRL to disable TC-10 sleep. Can you switch to 2.49 kOhm? This a 2-level strap. Thanks, Drewhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654808/dp83848q-q1-rtos-driver-for-dp83848q-q1/6381629Fri, 12 Jun 2026 22:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d9e18257-0bd1-497f-a97a-1eb247e3a254Gerome CachoHi Ted, My team is looking into this query. Please note that DP83848 is an older device and support is very limited. Sincerely, Geromehttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1650639/dp83867is-inquiry-on-phy-behavior-and-required-handling-when-gmac-is-reset-without-phy-reset-under-sgmii/6381594Fri, 12 Jun 2026 21:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c07fb349-4724-43d9-a910-71b37a2338b9Gregory KobyakovHi Asano-san, Thank you for sharing this read, I will look over it and provide comments. Best regards, Greghttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1654937/sn65hvd33-ep-suggest-me-how-it-can-be-interface-with-one-side-with-ir-module-tfdu4101-and-other-side-with-stm32h755/6381584Fri, 12 Jun 2026 21:36:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:be2a5c60-6142-46dc-baf5-8a272c9441e8BOBBYShweta, The IrDA is typically supposed to connect to the MCU/processor directly. You can&#39;t really interface it directly with an RS485 transceiver. If you wanted to extend the TTL signals using an RS485 transceiver, you could technically do IrDA-&gt; RS485 RS485-&lt;Processor But generally the connection is meant to be direct between the IrDA and a processor that supports SIR. -Bobbyhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1650402/tusb4041i-tusb4041i-intermittent-failed-enumeration-windows-11-usb2-0/6381567Fri, 12 Jun 2026 21:23:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:270bdd12-a9d9-4d80-b153-b04bad18180eEric HamelI believe the SoF height variance is due to a mix of poor rendering and insufficient probes. I&#39;m not sure how I can roll back the Windows 11 driver to that specific version.https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1650402/tusb4041i-tusb4041i-intermittent-failed-enumeration-windows-11-usb2-0/6381545Fri, 12 Jun 2026 20:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:645fbffd-89e2-4de2-b2e0-7accf08e8305Vishesh PithadiyaAny luck trying roll back the Windows 11 driver on the Windows 11 system?https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1650402/tusb4041i-tusb4041i-intermittent-failed-enumeration-windows-11-usb2-0/6381541Fri, 12 Jun 2026 20:55:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f6e68056-51a3-4b0a-9922-d8b3584ba601Vishesh PithadiyaHi Eric, Thanks for the waveforms. Looks like the SoF pulses on the Win11 looks to be different than Win10. Is this a rendering issue on the scope, or are the SoF pulse heights actually chnaging?