https://e2e.ti.com/support/interface-group/interface/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686919/fpc402evm-failed-to-download-fpc402-designSun, 04 Oct 2026 18:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7db5e8d5-73ac-4098-bcc9-0cc89d2ad3bdYvonne HouPart Number: FPC402EVM I received the design reference, and trying to download them but every link I clicked responds with the following error: Bad Request Your browser sent a request that this server could not understand. Size of a request header field exceeds server limit.FPC402EVMhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686896/max3232e-max3232ecdr-schematic-review-db9-and-3-5-mm-stereo-jack-interfacesSat, 03 Oct 2026 13:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:dc038b73-e385-4bd6-9cac-dc63e1f4fd2cRAYAN SAYEDPart Number: MAX3232E Other Parts Discussed in Thread: MAX3232 Hi TI Community I am designing two separate RS-232 interfaces using two individual MAX3232ECDR devices and would appreciate a review of the attached schematic before proceeding with PCB fabrication. U7 – MAX3232ECDR: RS-232 interface connected to DB9 connector J10 U10 – MAX3232ECDR: RS-232 interface connected to 3.5 mm stereo/TRS jack J11 Supply voltage: 3.3 V 1. Charge-pump connections For both MAX3232 devices, I am using 100 nF / 50 V ceramic capacitors for the charge pump: C1+ to C1− C2+ to C2− V+ to +3.3 V V− to GND Could you please confirm whether these connections are correct for VCC = 3.3 V , particularly the V+ capacitor connected to +3.3 V and the V− capacitor connected to GND ? Also, is 100 nF / 50 V suitable for these charge-pump capacitors? 2. DB9 interface – U7 The RS-232 signals are connected as: DOUT1 → DB9 pin 2 RIN1 ← DB9 pin 3 DB9 pin 5 → GND The other DB9 pins are unused. Could you please confirm whether this DB9 pin assignment is correct for a standard RS-232 interface ? 3. 3.5 mm stereo jack interface – U10 The second MAX3232 is connected to a 3.5 mm stereo/TRS jack Tip → DOUT2 Ring → RIN2 Sleeve → GND The intention is to use the stereo jack for RS-232 TX, RX, and GND . Could you please confirm whether this Tip/Ring/Sleeve assignment is suitable for RS-232 , and whether there are any concerns with using a 3.5 mm stereo jack for this interface? 4. Unused pins The unused MAX3232 pins are left unconnected as shown in the schematic. Should the unused logic inputs/outputs be left floating, or should any unused input be tied to GND or VCC? 5. General review I would also appreciate feedback on: ESD/TVS protection for the external connectors Decoupling capacitor placement Charge-pump capacitor placement Ground/layout considerations Any other schematic issues that should be addressed before PCB fabrication The schematic for both MAX3232ECDR interfaces is attached. Thank you in advance for your review and suggestions.Wired networkingMAX3232MAX3232Ehttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1680319/ds90ub960-q1-ds90ub960-q1-replicate-mode-for-tx-port-0-and-port-1-is-not-working/6500958Sat, 03 Oct 2026 01:07:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4e229235-5b6d-4816-adb6-3e9d2bbd8ca4Hamzeh JaradatHi Sachin, [quote userid=&quot;684591&quot; url=&quot;~/support/interface-group/interface/f/interface-forum/1680319/ds90ub960-q1-ds90ub960-q1-replicate-mode-for-tx-port-0-and-port-1-is-not-working/6500342&quot;]1. Can you please confirm if this sequence will work as expected?[/quote] That looks okay to me. [quote userid=&quot;684591&quot; url=&quot;~/support/interface-group/interface/f/interface-forum/1680319/ds90ub960-q1-ds90ub960-q1-replicate-mode-for-tx-port-0-and-port-1-is-not-working/6500342&quot;]2. Is any delay required between replicate bit enable and port forwarding enable?[/quote] Yes, it is better to implement say, 10ms after disable forwarding, and 10ms after enable replication. [quote userid=&quot;684591&quot; url=&quot;~/support/interface-group/interface/f/interface-forum/1680319/ds90ub960-q1-ds90ub960-q1-replicate-mode-for-tx-port-0-and-port-1-is-not-working/6500342&quot;]3. Are there any specific configuration/ additional checks required to ensure the above sequence is working?[/quote] There are no checks on the Des can be implemented to make sure the sequence is working. This should be tested with the SoC. Also, you may test without SoC, by writing the above manually and checking the CSI data traces on Port0 and Port1https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686157/tps65994ae-the-issue-for-tps66994/6500946Sat, 03 Oct 2026 00:06:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:57c24531-fea1-4d8c-9db6-8204acb80f2fPrajith CheerakkodaHi, I&#39;m concerned about the coordination and timing between PD controller and the MCU. Why don&#39;t you use the PD controller to control the load switch and the DCDC? Thanks Prajithhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1684922/dp83867ir-1000-base-compliance-test-mode-3/6500906Fri, 02 Oct 2026 22:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0005325f-c3d6-4634-b266-b92fa0ad5b41Gregory KobyakovHi Saitoh-san, Apologies for the delay. I nformation on test mode 3 has been removed since 86x devices do not support TX_TCLK-based testing. Test mode 3 is used when TX_TCLK is available. Best regards, Greghttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686741/dp83825i-inquiry-regarding-dp83825irmqt-phy/6500901Fri, 02 Oct 2026 22:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:bf781d9d-5b78-4cce-ae5c-dcb654f3325bGregory KobyakovHi Itoh-san, I will check on these questions and will get back to you as soon as possible. Best regards, Greghttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1681360/dp83867is-method-for-preventing-packet-loss-when-ifg-12bytes/6500893Fri, 02 Oct 2026 22:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:93857d31-d6b2-4c51-9efa-470a8669cdd4Gregory KobyakovHi Nishie-san, I will provide further comments early next week. Best regards, Greghttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686631/dp83869hm-weak-pull-up-weak-pull-down-pin-out/6500891Fri, 02 Oct 2026 22:33:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ca6a66f5-eb17-4d6f-86fe-23b7fcbfb4b0Gregory KobyakovHi Filipe, The WPU/WPD marking indicates if the pin has a weak internal pull-up or pull-down resistor. This indicates the default state that the pin is biased to on power-up or reset. Whether or not you need to pull up or pull down these pins is dependent on any strapping configuration you are doing. Best regards, Greghttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686720/tpd1e01b04-pcn-20260901003-1/6500889Fri, 02 Oct 2026 22:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:06f2ecb5-76c5-4549-97f1-b516b29a8e25Leah JonesHello, I have to reach out to our team, please give me a week or so. Apologies for the inconvenience. Best, Leah Joneshttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686721/dp83869hm-switch-to-jtag-mode/6500880Fri, 02 Oct 2026 22:14:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b0d46af9-9474-4d6b-9b0e-2b5bb48d153fGregory KobyakovHi Harald, Could you please help send this in English? Thanks! Best regards, Greghttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686620/bq79800evm-093-bq79800-q1-need-for-external-crystal/6500851Fri, 02 Oct 2026 21:39:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:361173f2-0bcb-4871-bea3-db032dc42245Nicholas YanchukWe do. I am happy to reply over email to elaborate.https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686729/tlk2711-sp-request-for-clarification-regarding-the-tlk2711-sp-receiver-input-voltage-differential-specification/6500842Fri, 02 Oct 2026 21:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:459c1b79-67ae-4ba0-9ab3-3485abb3c588Brian ZhouHi Nicolas: 220mV is differential pk-pk voltage, single ended should be 110mV. There is equalizer inside receiver that &#39;s why it can detect lower input voltage. Regards Brianhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686863/msp-exp430fr2355-programming-target-on-pcb-using-the-msp430fr2433-launchpadFri, 02 Oct 2026 21:21:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ac58a42b-78fc-42d7-a903-099f35a0c2d1Nina RapakPart Number: MSP-EXP430FR2355 Other Parts Discussed in Thread: MSP430FR2433 , MSP430FR2355 I have purchased the LAUNCHPAD MSP430FR2433 EVAL BRD to programming the 430 chip on the custom PCB. The board came with the USB connection to the host that will send the binary but I am having difficulty determining the cable to connect from the Eval Board (once the jumpers are removed) to the pin connector to get to the 4 pads on the PCB for programming the MSP430FR2355_RHA. Can you direct me to the type of cable or connection needed and the correct connectors/headers to purchase to be able to make this connection work? Thank you in advance.MSP430FR2433MSP-EXP430FR2355msp430fr2355https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686620/bq79800evm-093-bq79800-q1-need-for-external-crystal/6500811Fri, 02 Oct 2026 20:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:53f6cc99-f8e9-438f-bb6e-5ec606af7c3eMichelle WilliamsHi Nicholas, Does your company have an NDA with TI? If so, we can continue this conversation over email. Since this is a public forum, I can&#39;t fully answer your question here. Sincerely, Michelle W.https://e2e.ti.com/support/interface-group/interface/f/interface-forum/1685892/txu0102-cpu-ufs-clk-1-05v-to-ufs-1-8v/6500727Fri, 02 Oct 2026 18:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a64cbce6-ce06-49ee-95d2-49c15cfc6ee5Sakthivel RameshHello Jeff, No problem! Thank You, Sakthivel Rameshhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686278/dp83tg721r-q1-pin-description-is-not-available-in-datasheet/6500666Fri, 02 Oct 2026 17:52:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:82ba9178-9a78-4496-bfa5-9dd18f5dc841CharlesNavy, I can can confirm from my side that you have been approved and should have proper access. I can also confirm that I&#39;m having no trouble downloading/opening the files in the secure TG721 secure folder: https://www.ti.com/secureresources/DP83TG721-Q1-DESIGN Please try using a different browser and signing in to TI.com with the account you used to request secure access. Best, Charleshttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686789/mux36s16-unpower-mux-performance/6500580Fri, 02 Oct 2026 15:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7852c710-3da8-46d9-848d-b6b3131168ccJoseph BorrelliKaty, This TMUX7308F device looks promising. I will review the datasheet in more detail. I like that fact that the digital pins require lower input voltages than the legacy parts. I appreciate your support! Regards, Joe Bhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686780/tmux2889-charge-pump-in-tmux2889/6500577Fri, 02 Oct 2026 15:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:028f026e-aabe-4592-90f7-84301c0b7c21Katy WestHi Thomas, Yes, there is a charge pump in this device. Best, Katyhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686789/mux36s16-unpower-mux-performance/6500572Fri, 02 Oct 2026 15:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:2a7bdf00-8407-45c2-ac69-8ecc38569892Katy WestHi Joe, Thanks for clarifying the part number. The closest option to what you are looking for is going to be one of our fault-protected muxes that has over-voltage protection on the input (S) pins. We have an 8:1 option here with OVP up to +/-60V - TMUX7308F . I will make a note to add a 16:1 OVP mux to our backlog. Best, Katyhttps://e2e.ti.com/support/interface-group/interface/f/interface-forum/1686619/tusb1046-dci-no-longer-using-dp0-auxn-hpdin-pins/6500563Fri, 02 Oct 2026 15:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ddd1ff4e-a8e7-4284-83a6-d6a0313de17aRyan KittoHello, Understood. In that case, please ensure the PD controller is correctly setting the CTL pins of the TUSB1046-DCI. The redriver should be set to only USB3.1 mode Thanks, Ryan